mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 03:36:48 +07:00
794e96e8ec
Highlights: * Support for Calxeda ECX-2000 memory controller, from Robert Richter * Misc Calxeda Highbank drivers and EDAC core cleanups, from Rob Herring and Robert Richter * New maintainer for Freescale's MPC85xx EDAC driver: Johannes Thumshirn -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSiRmeAAoJEBLB8Bhh3lVKYswQAKPCYSsIQg3L3K3320uvWV3x NEAxAAdYyN2ds7ksLv//54FBLgH9UeiC56glTMmnK9QvfGCcgHGo1WJCa84LwqIf M7H6mKSgTEBZXr7HpWgtarMYjpNve4Nh8SwHv7tlWRJNd3ufcBbOfCY6rEreULJd sBTRMuEPc1Ki7NxZr2m/xsPyzWXS1N1nSd2aewiszyY3Rwp1vIAPv/Chr7UwF/Fm GGeQonc801hVRIQONwxsXzS2qwj/wgx8OPab05psfMuv6CWLxQQJAzGWbe+gv3V4 mYx64+U4nOkQ/knRAf9s0fLwJX6DWSTtQer7m5YSUey0dYDfgV+DemLFvS5We7XB os9PBGL+0bGUrJ0cnLE6O+6S1qniWaKZrhSZndcYiVoQeDZmaMuartFlIaeRvY21 WJML2oqqUop2ZyaIKInJEyeD74FIf7BsG3V+RJwsCZx5+38Pm0EnBZqGJ9bnJl7x OxXlHjwjZRhlVFIdcN5WeaKoKmXpdcnzLcL1XE2wMgs9ZFaleeyTDXuQm+XxkKGd ExD/1TbAoBqFF7FwIAQwqPf1f2HPDBKlSg38X6l6NV5uLK/u5rdffKTMQPWi/6p2 RDO+Ddbypzm72850hcYc9mY+B8Qe3T3F/iKlbELiK1S5+IQzm/hmfTDcyKStwKZn cCTvsIo9QHflhshXR1a8 =pU/h -----END PGP SIGNATURE----- Merge tag 'edac_for_3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp Pull EDAC updates from Borislav Petkov: "Following up on last week's discussion, here's my part of the EDAC pile, highlights in the signed tag. The last two patches have a date from just now because I've just applied them to the tree after Johannes sent them to me earlier. I decided to forward them now because they're trivial. There's a third one for MPC85xx which adds PCIe error interrupt support but since it is not so trivial and hasn't seen any linux-next time, I'm deferring it to 3.14 EDAC update highlights: - Support for Calxeda ECX-2000 memory controller, from Robert Richter - Misc Calxeda Highbank drivers and EDAC core cleanups, from Rob Herring and Robert Richter - New maintainer for Freescale's MPC85xx EDAC driver: Johannes Thumshirn" * tag 'edac_for_3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: edac/85xx: Remove mpc85xx_pci_err_remove EDAC: Add edac-mpc85xx driver to MAINTAINERS edac, highbank: Moving error injection to sysfs for edac edac, highbank: Add MAINTAINERS entry edac: Unify reporting of device info for device, mc and pci edac, highbank: Improve and unify naming edac, highbank: Add Calxeda ECX-2000 support ARM: dts: calxeda: move memory-controller node out of ecx-common.dtsi edac, highbank: Fix interrupt setup of mem and l2 controller
242 lines
5.2 KiB
Plaintext
242 lines
5.2 KiB
Plaintext
/*
|
|
* Copyright 2011-2012 Calxeda, Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms and conditions of the GNU General Public License,
|
|
* version 2, as published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
* more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License along with
|
|
* this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
/ {
|
|
chosen {
|
|
bootargs = "console=ttyAMA0";
|
|
};
|
|
|
|
psci {
|
|
compatible = "arm,psci";
|
|
method = "smc";
|
|
cpu_suspend = <0x84000002>;
|
|
cpu_off = <0x84000004>;
|
|
cpu_on = <0x84000006>;
|
|
};
|
|
|
|
soc {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "simple-bus";
|
|
interrupt-parent = <&intc>;
|
|
|
|
sata@ffe08000 {
|
|
compatible = "calxeda,hb-ahci";
|
|
reg = <0xffe08000 0x10000>;
|
|
interrupts = <0 83 4>;
|
|
dma-coherent;
|
|
calxeda,port-phys = <&combophy5 0 &combophy0 0
|
|
&combophy0 1 &combophy0 2
|
|
&combophy0 3>;
|
|
calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>;
|
|
calxeda,led-order = <4 0 1 2 3>;
|
|
};
|
|
|
|
sdhci@ffe0e000 {
|
|
compatible = "calxeda,hb-sdhci";
|
|
reg = <0xffe0e000 0x1000>;
|
|
interrupts = <0 90 4>;
|
|
clocks = <&eclk>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ipc@fff20000 {
|
|
compatible = "arm,pl320", "arm,primecell";
|
|
reg = <0xfff20000 0x1000>;
|
|
interrupts = <0 7 4>;
|
|
clocks = <&pclk>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
gpioe: gpio@fff30000 {
|
|
#gpio-cells = <2>;
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
gpio-controller;
|
|
reg = <0xfff30000 0x1000>;
|
|
interrupts = <0 14 4>;
|
|
clocks = <&pclk>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
gpiof: gpio@fff31000 {
|
|
#gpio-cells = <2>;
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
gpio-controller;
|
|
reg = <0xfff31000 0x1000>;
|
|
interrupts = <0 15 4>;
|
|
clocks = <&pclk>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
gpiog: gpio@fff32000 {
|
|
#gpio-cells = <2>;
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
gpio-controller;
|
|
reg = <0xfff32000 0x1000>;
|
|
interrupts = <0 16 4>;
|
|
clocks = <&pclk>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
gpioh: gpio@fff33000 {
|
|
#gpio-cells = <2>;
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
gpio-controller;
|
|
reg = <0xfff33000 0x1000>;
|
|
interrupts = <0 17 4>;
|
|
clocks = <&pclk>;
|
|
clock-names = "apb_pclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
timer@fff34000 {
|
|
compatible = "arm,sp804", "arm,primecell";
|
|
reg = <0xfff34000 0x1000>;
|
|
interrupts = <0 18 4>;
|
|
clocks = <&pclk>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
rtc@fff35000 {
|
|
compatible = "arm,pl031", "arm,primecell";
|
|
reg = <0xfff35000 0x1000>;
|
|
interrupts = <0 19 4>;
|
|
clocks = <&pclk>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
serial@fff36000 {
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0xfff36000 0x1000>;
|
|
interrupts = <0 20 4>;
|
|
clocks = <&pclk>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
smic@fff3a000 {
|
|
compatible = "ipmi-smic";
|
|
device_type = "ipmi";
|
|
reg = <0xfff3a000 0x1000>;
|
|
interrupts = <0 24 4>;
|
|
reg-size = <4>;
|
|
reg-spacing = <4>;
|
|
};
|
|
|
|
sregs@fff3c000 {
|
|
compatible = "calxeda,hb-sregs";
|
|
reg = <0xfff3c000 0x1000>;
|
|
|
|
clocks {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
osc: oscillator {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <33333000>;
|
|
};
|
|
|
|
ddrpll: ddrpll {
|
|
#clock-cells = <0>;
|
|
compatible = "calxeda,hb-pll-clock";
|
|
clocks = <&osc>;
|
|
reg = <0x108>;
|
|
};
|
|
|
|
a9pll: a9pll {
|
|
#clock-cells = <0>;
|
|
compatible = "calxeda,hb-pll-clock";
|
|
clocks = <&osc>;
|
|
reg = <0x100>;
|
|
};
|
|
|
|
a9periphclk: a9periphclk {
|
|
#clock-cells = <0>;
|
|
compatible = "calxeda,hb-a9periph-clock";
|
|
clocks = <&a9pll>;
|
|
reg = <0x104>;
|
|
};
|
|
|
|
a9bclk: a9bclk {
|
|
#clock-cells = <0>;
|
|
compatible = "calxeda,hb-a9bus-clock";
|
|
clocks = <&a9pll>;
|
|
reg = <0x104>;
|
|
};
|
|
|
|
emmcpll: emmcpll {
|
|
#clock-cells = <0>;
|
|
compatible = "calxeda,hb-pll-clock";
|
|
clocks = <&osc>;
|
|
reg = <0x10C>;
|
|
};
|
|
|
|
eclk: eclk {
|
|
#clock-cells = <0>;
|
|
compatible = "calxeda,hb-emmc-clock";
|
|
clocks = <&emmcpll>;
|
|
reg = <0x114>;
|
|
};
|
|
|
|
pclk: pclk {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <150000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
dma@fff3d000 {
|
|
compatible = "arm,pl330", "arm,primecell";
|
|
reg = <0xfff3d000 0x1000>;
|
|
interrupts = <0 92 4>;
|
|
clocks = <&pclk>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
ethernet@fff50000 {
|
|
compatible = "calxeda,hb-xgmac";
|
|
reg = <0xfff50000 0x1000>;
|
|
interrupts = <0 77 4 0 78 4 0 79 4>;
|
|
dma-coherent;
|
|
};
|
|
|
|
ethernet@fff51000 {
|
|
compatible = "calxeda,hb-xgmac";
|
|
reg = <0xfff51000 0x1000>;
|
|
interrupts = <0 80 4 0 81 4 0 82 4>;
|
|
dma-coherent;
|
|
};
|
|
|
|
combophy0: combo-phy@fff58000 {
|
|
compatible = "calxeda,hb-combophy";
|
|
#phy-cells = <1>;
|
|
reg = <0xfff58000 0x1000>;
|
|
phydev = <5>;
|
|
};
|
|
|
|
combophy5: combo-phy@fff5d000 {
|
|
compatible = "calxeda,hb-combophy";
|
|
#phy-cells = <1>;
|
|
reg = <0xfff5d000 0x1000>;
|
|
phydev = <31>;
|
|
};
|
|
};
|
|
};
|