Caesar Wang 9aba783a2a dt-bindings: rockchip-thermal: Add the pinctrl states in this document ... The "init" pinctrl is defined we'll set pinctrl to this state before probe and then "default" after probe. Add the "init" and "sleep" pinctrl as the OTP gpio state, since we need switch the pin to gpio state before the TSADC controller is reset. AFAIK, the TSADC controller is reset, the tshut polarity will be a *low* signal in a short period of time for some devices. Says: The TSADC get the temperature on rockchip thermal. If T(current temperature) < (setting temperature), the OTP output the *high* signal. If T(current temperature) > (setting temperature), the OTP output the *low* Signal. In some cases, the OTP pin is connected to the PMIC, maybe the PMIC can accept the reset response time to avoid this issue. In other words, the system will be always reboot if we make the OTP pin is connected the others IC to control the power. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>		2015-11-03 09:57:08 -08:00
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bindings	dt-bindings: rockchip-thermal: Add the pinctrl states in this document	2015-11-03 09:57:08 -08:00
00-INDEX
booting-without-of.txt	ARM: 8354/1: Documentation: devicetree: root node serial-number property documentation	2015-05-08 10:42:34 +01:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt
overlay-notes.txt
todo.txt
usage-model.txt