mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 15:18:24 +07:00
132fdc379e
Commit3b8c9f1cdf("arm64: IPI each CPU after invalidating the I-cache for kernel mappings") was aimed at fixing the I-cache invalidation for kernel mappings. However, it inadvertently caused all cache maintenance for user mappings via set_pte_at() -> __sync_icache_dcache() -> sync_icache_aliases() to call kick_all_cpus_sync(). Reported-by: Shijith Thotton <sthotton@marvell.com> Tested-by: Shijith Thotton <sthotton@marvell.com> Reported-by: Wandun Chen <chenwandun@huawei.com> Fixes:3b8c9f1cdf("arm64: IPI each CPU after invalidating the I-cache for kernel mappings") Cc: <stable@vger.kernel.org> # 4.19.x- Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
107 lines
2.8 KiB
C
107 lines
2.8 KiB
C
/*
|
|
* Based on arch/arm/mm/flush.c
|
|
*
|
|
* Copyright (C) 1995-2002 Russell King
|
|
* Copyright (C) 2012 ARM Ltd.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
#include <linux/export.h>
|
|
#include <linux/mm.h>
|
|
#include <linux/pagemap.h>
|
|
|
|
#include <asm/cacheflush.h>
|
|
#include <asm/cache.h>
|
|
#include <asm/tlbflush.h>
|
|
|
|
void sync_icache_aliases(void *kaddr, unsigned long len)
|
|
{
|
|
unsigned long addr = (unsigned long)kaddr;
|
|
|
|
if (icache_is_aliasing()) {
|
|
__clean_dcache_area_pou(kaddr, len);
|
|
__flush_icache_all();
|
|
} else {
|
|
/*
|
|
* Don't issue kick_all_cpus_sync() after I-cache invalidation
|
|
* for user mappings.
|
|
*/
|
|
__flush_icache_range(addr, addr + len);
|
|
}
|
|
}
|
|
|
|
static void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
|
|
unsigned long uaddr, void *kaddr,
|
|
unsigned long len)
|
|
{
|
|
if (vma->vm_flags & VM_EXEC)
|
|
sync_icache_aliases(kaddr, len);
|
|
}
|
|
|
|
/*
|
|
* Copy user data from/to a page which is mapped into a different processes
|
|
* address space. Really, we want to allow our "user space" model to handle
|
|
* this.
|
|
*/
|
|
void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
|
|
unsigned long uaddr, void *dst, const void *src,
|
|
unsigned long len)
|
|
{
|
|
memcpy(dst, src, len);
|
|
flush_ptrace_access(vma, page, uaddr, dst, len);
|
|
}
|
|
|
|
void __sync_icache_dcache(pte_t pte)
|
|
{
|
|
struct page *page = pte_page(pte);
|
|
|
|
if (!test_and_set_bit(PG_dcache_clean, &page->flags))
|
|
sync_icache_aliases(page_address(page),
|
|
PAGE_SIZE << compound_order(page));
|
|
}
|
|
EXPORT_SYMBOL_GPL(__sync_icache_dcache);
|
|
|
|
/*
|
|
* This function is called when a page has been modified by the kernel. Mark
|
|
* it as dirty for later flushing when mapped in user space (if executable,
|
|
* see __sync_icache_dcache).
|
|
*/
|
|
void flush_dcache_page(struct page *page)
|
|
{
|
|
if (test_bit(PG_dcache_clean, &page->flags))
|
|
clear_bit(PG_dcache_clean, &page->flags);
|
|
}
|
|
EXPORT_SYMBOL(flush_dcache_page);
|
|
|
|
/*
|
|
* Additional functions defined in assembly.
|
|
*/
|
|
EXPORT_SYMBOL(__flush_icache_range);
|
|
|
|
#ifdef CONFIG_ARCH_HAS_PMEM_API
|
|
void arch_wb_cache_pmem(void *addr, size_t size)
|
|
{
|
|
/* Ensure order against any prior non-cacheable writes */
|
|
dmb(osh);
|
|
__clean_dcache_area_pop(addr, size);
|
|
}
|
|
EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
|
|
|
|
void arch_invalidate_pmem(void *addr, size_t size)
|
|
{
|
|
__inval_dcache_area(addr, size);
|
|
}
|
|
EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
|
|
#endif
|