mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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dadeafdfc8
We were flushing the D-cache excessively for ptrace() processing and this makes debugging threads so slow as to be totally unusable. All process page accesses via ptrace() go via access_process_vm(). This routine, for each process page, uses get_user_pages(). That in turn does a flush_dcache_page() on the child pages before we copy in/out the ptrace request data. Therefore, all we need to do after the data movement is: 1) Flush the D-cache pages if the kernel maps the page to a different color than userspace does. 2) If we wrote to the page, we need to flush the I-cache on older cpus. Previously we just flushed the entire cache at the end of a ptrace() request, and that was beyond stupid. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
79 lines
2.5 KiB
C
79 lines
2.5 KiB
C
#ifndef _SPARC64_CACHEFLUSH_H
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#define _SPARC64_CACHEFLUSH_H
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#include <linux/config.h>
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#include <asm/page.h>
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/* Flushing for D-cache alias handling is only needed if
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* the page size is smaller than 16K.
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*/
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#if PAGE_SHIFT < 14
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#define DCACHE_ALIASING_POSSIBLE
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#endif
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#ifndef __ASSEMBLY__
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#include <linux/mm.h>
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/* Cache flush operations. */
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/* These are the same regardless of whether this is an SMP kernel or not. */
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#define flush_cache_mm(__mm) \
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do { if ((__mm) == current->mm) flushw_user(); } while(0)
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#define flush_cache_range(vma, start, end) \
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flush_cache_mm((vma)->vm_mm)
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#define flush_cache_page(vma, page, pfn) \
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flush_cache_mm((vma)->vm_mm)
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/*
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* On spitfire, the icache doesn't snoop local stores and we don't
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* use block commit stores (which invalidate icache lines) during
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* module load, so we need this.
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*/
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extern void flush_icache_range(unsigned long start, unsigned long end);
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extern void __flush_icache_page(unsigned long);
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extern void __flush_dcache_page(void *addr, int flush_icache);
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extern void flush_dcache_page_impl(struct page *page);
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#ifdef CONFIG_SMP
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extern void smp_flush_dcache_page_impl(struct page *page, int cpu);
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extern void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
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#else
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#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
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#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
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#endif
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extern void __flush_dcache_range(unsigned long start, unsigned long end);
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extern void flush_dcache_page(struct page *page);
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#define flush_icache_page(vma, pg) do { } while(0)
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#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
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extern void flush_ptrace_access(struct vm_area_struct *, struct page *,
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unsigned long uaddr, void *kaddr,
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unsigned long len, int write);
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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flush_cache_page(vma, vaddr, page_to_pfn(page)); \
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memcpy(dst, src, len); \
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flush_ptrace_access(vma, page, vaddr, src, len, 0); \
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} while (0)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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flush_cache_page(vma, vaddr, page_to_pfn(page)); \
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memcpy(dst, src, len); \
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flush_ptrace_access(vma, page, vaddr, dst, len, 1); \
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} while (0)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#define flush_cache_vmap(start, end) do { } while (0)
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#define flush_cache_vunmap(start, end) do { } while (0)
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#endif /* !__ASSEMBLY__ */
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#endif /* _SPARC64_CACHEFLUSH_H */
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