mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 03:59:55 +07:00
fc1acf317b
Add support for the Image Processing Unit (IPU) found in all Ingenic
SoCs.
The IPU can upscale and downscale a source frame of arbitrary size
ranging from 4x4 to 4096x4096 on newer SoCs, with bicubic filtering
on newer SoCs, bilinear filtering on older SoCs. Nearest-neighbour can
also be obtained with proper coefficients.
Starting from the JZ4725B, the IPU supports a mode where its output is
sent directly to the LCDC, without having to be written to RAM first.
This makes it possible to use the IPU as a DRM plane on the compatible
SoCs, and have it convert and scale anything the userspace asks for to
what's available for the display.
Regarding pixel formats, older SoCs support packed YUV 4:2:2 and various
planar YUV formats. Newer SoCs introduced support for RGB.
Since the IPU is a separate hardware block, to make it work properly the
Ingenic DRM driver will now register itself as a component master in
case the IPU driver has been enabled in the config.
When enabled in the config, the CRTC will see the IPU as a second primary
plane. It cannot be enabled at the same time as the regular primary
plane. It has the same priority, which means that it will also display
below the overlay plane.
v2: - ingenic-ipu is no longer its own module. It will be built
into the ingenic-drm module.
- If enabled in the config, both the core driver and the IPU
driver will register as components; otherwise the core
driver will bypass that and call the ingenic_drm_bind()
function directly.
- Since both files now build into the same module, the
symbols previously exported as GPL are not exported anymore,
since they are only used internally.
- Fix SPDX license header in ingenic-ipu.h
- Avoid using 'for(;;);' loops without trailing statement(s)
v3: - Pass priv structure to IRQ handler; that way we don't hardcode
the expectation that the IPU plane is at index #0.
- Rework osd_changed() to account for src_* changes
- Add multiplanar YUV 4:4:4 support
- Commit fb addresses to HW at vblank, since addr registers are
not shadow registers
- Probe IPU component later so that IPU plane is last
- Fix driver not working on IPU-less hardware
- Use IPU driver's name as the IRQ name to avoid having two
'ingenic-drm' in /proc/interrupts
- Fix IPU only working for still images on JZ4725B
- Add a bit more code comments
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716163846.174790-10-paul@crapouillou.net
28 lines
680 B
Plaintext
28 lines
680 B
Plaintext
config DRM_INGENIC
|
|
tristate "DRM Support for Ingenic SoCs"
|
|
depends on MIPS || COMPILE_TEST
|
|
depends on DRM
|
|
depends on CMA
|
|
depends on OF
|
|
select DRM_BRIDGE
|
|
select DRM_PANEL_BRIDGE
|
|
select DRM_KMS_HELPER
|
|
select DRM_KMS_CMA_HELPER
|
|
select DRM_GEM_CMA_HELPER
|
|
select VT_HW_CONSOLE_BINDING if FRAMEBUFFER_CONSOLE
|
|
help
|
|
Choose this option for DRM support for the Ingenic SoCs.
|
|
|
|
If M is selected the module will be called ingenic-drm.
|
|
|
|
if DRM_INGENIC
|
|
|
|
config DRM_INGENIC_IPU
|
|
bool "IPU support for Ingenic SoCs"
|
|
help
|
|
Choose this option to enable support for the IPU found in Ingenic SoCs.
|
|
|
|
The Image Processing Unit (IPU) will appear as a second primary plane.
|
|
|
|
endif
|