Hugh Dickins 2c991e408d x86/events/intel/ds: Fix bts_interrupt_threshold alignment ... Markus reported that BTS is sporadically missing the tail of the trace in the perf_event data buffer: [decode error (1): instruction overflow] shown in GDB; and bisected it to the conversion of debug_store to PTI. A little "optimization" crept into alloc_bts_buffer(), which mistakenly placed bts_interrupt_threshold away from the 24-byte record boundary. Intel SDM Vol 3B 17.4.9 says "This address must point to an offset from the BTS buffer base that is a multiple of the BTS record size." Revert "max" from a byte count to a record count, to calculate the bts_interrupt_threshold correctly: which turns out to fix problem seen. Fixes: c1961a4631 ("x86/events/intel/ds: Map debug buffers in cpu_entry_area") Reported-and-tested-by: Markus T Metzger <markus.t.metzger@intel.com> Signed-off-by: Hugh Dickins <hughd@google.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@intel.com> Cc: Andi Kleen <andi.kleen@intel.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Stephane Eranian <eranian@google.com> Cc: stable@vger.kernel.org # v4.14+ Link: https://lkml.kernel.org/r/alpine.LSU.2.11.1807141248290.1614@eggly.anvils		2018-07-15 11:38:44 +02:00
..
amd	treewide: kzalloc() -> kcalloc()	2018-06-12 16:19:22 -07:00
intel	x86/events/intel/ds: Fix bts_interrupt_threshold alignment	2018-07-15 11:38:44 +02:00
core.c	treewide: kmalloc() -> kmalloc_array()	2018-06-12 16:19:22 -07:00
Kconfig	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
Makefile	perf/x86/events: Add an AMD-specific Makefile	2017-01-30 12:01:19 +01:00
msr.c	perf/x86/msr: Fix possible Spectre-v1 indexing in the MSR driver	2018-05-05 08:37:29 +02:00
perf_event.h	Merge branch 'perf/urgent' into perf/core, to pick up fixes	2018-03-24 09:21:47 +01:00