mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c6e387a214
* No code changes... * Split hw.c to multiple files for better maintenance and add some documentation on each file code is going to grow soon (eeprom.c for example is going to get much stuff currently developed on ath_info) so it's better this way. * Rename following functions to maintain naming scheme: ah_setup_xtx_desc -> ah_setup_mrr_tx_desc (Because xtx doesn't say much, it's actually a multi-rate-retry tx descriptor) ath5k_hw_put_tx/rx_buf - > ath5k_hw_set_tx/rxdp ath5k_hw_get_tx/rx_buf -> ath5k_hw_get_tx/rxdp (We don't put any "buf" we set descriptor pointers on hw) ath5k_hw_tx_start -> ath5k_hw_start_tx_dma ath5k_hw_start_rx -> ath5k_hw_start_rx_dma ath5k_hw_stop_pcu_recv -> ath5k_hw_stop_rx_pcu (It's easier this way to identify them, we also have ath5k_hw_start_rx_pcu which completes the set) ath5k_hw_set_intr -> ath5k_hw_set_imr (As in get_isr we set imr here, not "intr") * Move ath5k_hw_setup_rx_desc on ah->ah_setup_rx_desc so we can include support for different rx descriptors in the future * Further cleanups so that checkpatch doesn't complain (only some > 80 col warnings for eeprom.h and reg.h as usual due to comments) Tested on 5211 and 5213 cards and works ok. Changes-licensed-under: ISC Signed-off-by: Nick Kossifidis <mickflemm@gmail.com> Acked-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
580 lines
16 KiB
C
580 lines
16 KiB
C
/*
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* Copyright (c) 2007-2008 Bruno Randolf <bruno@thinktube.com>
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*
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* This file is free software: you may copy, redistribute and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 2 of the License, or (at your
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* option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*
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* This file incorporates work covered by the following copyright and
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* permission notice:
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*
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* Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
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* Copyright (c) 2004-2005 Atheros Communications, Inc.
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* Copyright (c) 2006 Devicescape Software, Inc.
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* Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
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* Copyright (c) 2007 Luis R. Rodriguez <mcgrof@winlab.rutgers.edu>
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include "base.h"
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#include "debug.h"
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static unsigned int ath5k_debug;
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module_param_named(debug, ath5k_debug, uint, 0);
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#ifdef CONFIG_ATH5K_DEBUG
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#include <linux/seq_file.h>
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#include "reg.h"
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static struct dentry *ath5k_global_debugfs;
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static int ath5k_debugfs_open(struct inode *inode, struct file *file)
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{
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file->private_data = inode->i_private;
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return 0;
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}
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/* debugfs: registers */
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struct reg {
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char *name;
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int addr;
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};
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#define REG_STRUCT_INIT(r) { #r, r }
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/* just a few random registers, might want to add more */
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static struct reg regs[] = {
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REG_STRUCT_INIT(AR5K_CR),
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REG_STRUCT_INIT(AR5K_RXDP),
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REG_STRUCT_INIT(AR5K_CFG),
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REG_STRUCT_INIT(AR5K_IER),
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REG_STRUCT_INIT(AR5K_BCR),
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REG_STRUCT_INIT(AR5K_RTSD0),
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REG_STRUCT_INIT(AR5K_RTSD1),
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REG_STRUCT_INIT(AR5K_TXCFG),
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REG_STRUCT_INIT(AR5K_RXCFG),
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REG_STRUCT_INIT(AR5K_RXJLA),
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REG_STRUCT_INIT(AR5K_MIBC),
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REG_STRUCT_INIT(AR5K_TOPS),
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REG_STRUCT_INIT(AR5K_RXNOFRM),
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REG_STRUCT_INIT(AR5K_TXNOFRM),
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REG_STRUCT_INIT(AR5K_RPGTO),
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REG_STRUCT_INIT(AR5K_RFCNT),
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REG_STRUCT_INIT(AR5K_MISC),
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REG_STRUCT_INIT(AR5K_QCUDCU_CLKGT),
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REG_STRUCT_INIT(AR5K_ISR),
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REG_STRUCT_INIT(AR5K_PISR),
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REG_STRUCT_INIT(AR5K_SISR0),
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REG_STRUCT_INIT(AR5K_SISR1),
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REG_STRUCT_INIT(AR5K_SISR2),
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REG_STRUCT_INIT(AR5K_SISR3),
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REG_STRUCT_INIT(AR5K_SISR4),
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REG_STRUCT_INIT(AR5K_IMR),
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REG_STRUCT_INIT(AR5K_PIMR),
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REG_STRUCT_INIT(AR5K_SIMR0),
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REG_STRUCT_INIT(AR5K_SIMR1),
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REG_STRUCT_INIT(AR5K_SIMR2),
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REG_STRUCT_INIT(AR5K_SIMR3),
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REG_STRUCT_INIT(AR5K_SIMR4),
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REG_STRUCT_INIT(AR5K_DCM_ADDR),
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REG_STRUCT_INIT(AR5K_DCCFG),
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REG_STRUCT_INIT(AR5K_CCFG),
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REG_STRUCT_INIT(AR5K_CPC0),
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REG_STRUCT_INIT(AR5K_CPC1),
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REG_STRUCT_INIT(AR5K_CPC2),
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REG_STRUCT_INIT(AR5K_CPC3),
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REG_STRUCT_INIT(AR5K_CPCOVF),
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REG_STRUCT_INIT(AR5K_RESET_CTL),
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REG_STRUCT_INIT(AR5K_SLEEP_CTL),
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REG_STRUCT_INIT(AR5K_INTPEND),
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REG_STRUCT_INIT(AR5K_SFR),
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REG_STRUCT_INIT(AR5K_PCICFG),
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REG_STRUCT_INIT(AR5K_GPIOCR),
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REG_STRUCT_INIT(AR5K_GPIODO),
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REG_STRUCT_INIT(AR5K_SREV),
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};
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static void *reg_start(struct seq_file *seq, loff_t *pos)
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{
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return *pos < ARRAY_SIZE(regs) ? ®s[*pos] : NULL;
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}
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static void reg_stop(struct seq_file *seq, void *p)
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{
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/* nothing to do */
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}
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static void *reg_next(struct seq_file *seq, void *p, loff_t *pos)
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{
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++*pos;
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return *pos < ARRAY_SIZE(regs) ? ®s[*pos] : NULL;
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}
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static int reg_show(struct seq_file *seq, void *p)
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{
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struct ath5k_softc *sc = seq->private;
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struct reg *r = p;
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seq_printf(seq, "%-25s0x%08x\n", r->name,
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ath5k_hw_reg_read(sc->ah, r->addr));
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return 0;
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}
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static struct seq_operations register_seq_ops = {
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.start = reg_start,
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.next = reg_next,
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.stop = reg_stop,
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.show = reg_show
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};
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static int open_file_registers(struct inode *inode, struct file *file)
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{
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struct seq_file *s;
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int res;
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res = seq_open(file, ®ister_seq_ops);
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if (res == 0) {
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s = file->private_data;
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s->private = inode->i_private;
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}
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return res;
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}
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static const struct file_operations fops_registers = {
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.open = open_file_registers,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = seq_release,
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.owner = THIS_MODULE,
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};
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/* debugfs: TSF */
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static ssize_t read_file_tsf(struct file *file, char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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struct ath5k_softc *sc = file->private_data;
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char buf[100];
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snprintf(buf, sizeof(buf), "0x%016llx\n",
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(unsigned long long)ath5k_hw_get_tsf64(sc->ah));
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return simple_read_from_buffer(user_buf, count, ppos, buf, 19);
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}
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static ssize_t write_file_tsf(struct file *file,
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const char __user *userbuf,
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size_t count, loff_t *ppos)
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{
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struct ath5k_softc *sc = file->private_data;
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char buf[20];
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if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
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return -EFAULT;
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if (strncmp(buf, "reset", 5) == 0) {
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ath5k_hw_reset_tsf(sc->ah);
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printk(KERN_INFO "debugfs reset TSF\n");
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}
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return count;
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}
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static const struct file_operations fops_tsf = {
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.read = read_file_tsf,
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.write = write_file_tsf,
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.open = ath5k_debugfs_open,
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.owner = THIS_MODULE,
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};
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/* debugfs: beacons */
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static ssize_t read_file_beacon(struct file *file, char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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struct ath5k_softc *sc = file->private_data;
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struct ath5k_hw *ah = sc->ah;
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char buf[500];
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unsigned int len = 0;
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unsigned int v;
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u64 tsf;
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v = ath5k_hw_reg_read(sc->ah, AR5K_BEACON);
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len += snprintf(buf+len, sizeof(buf)-len,
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"%-24s0x%08x\tintval: %d\tTIM: 0x%x\n",
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"AR5K_BEACON", v, v & AR5K_BEACON_PERIOD,
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(v & AR5K_BEACON_TIM) >> AR5K_BEACON_TIM_S);
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len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\n",
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"AR5K_LAST_TSTP", ath5k_hw_reg_read(sc->ah, AR5K_LAST_TSTP));
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len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\n\n",
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"AR5K_BEACON_CNT", ath5k_hw_reg_read(sc->ah, AR5K_BEACON_CNT));
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v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER0);
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len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\tTU: %08x\n",
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"AR5K_TIMER0 (TBTT)", v, v);
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v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER1);
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len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\tTU: %08x\n",
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"AR5K_TIMER1 (DMA)", v, v >> 3);
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v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER2);
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len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\tTU: %08x\n",
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"AR5K_TIMER2 (SWBA)", v, v >> 3);
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v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER3);
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len += snprintf(buf+len, sizeof(buf)-len, "%-24s0x%08x\tTU: %08x\n",
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"AR5K_TIMER3 (ATIM)", v, v);
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tsf = ath5k_hw_get_tsf64(sc->ah);
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len += snprintf(buf+len, sizeof(buf)-len,
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"TSF\t\t0x%016llx\tTU: %08x\n",
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(unsigned long long)tsf, TSF_TO_TU(tsf));
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return simple_read_from_buffer(user_buf, count, ppos, buf, len);
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}
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static ssize_t write_file_beacon(struct file *file,
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const char __user *userbuf,
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size_t count, loff_t *ppos)
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{
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struct ath5k_softc *sc = file->private_data;
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struct ath5k_hw *ah = sc->ah;
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char buf[20];
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if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
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return -EFAULT;
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if (strncmp(buf, "disable", 7) == 0) {
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AR5K_REG_DISABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE);
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printk(KERN_INFO "debugfs disable beacons\n");
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} else if (strncmp(buf, "enable", 6) == 0) {
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AR5K_REG_ENABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE);
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printk(KERN_INFO "debugfs enable beacons\n");
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}
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return count;
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}
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static const struct file_operations fops_beacon = {
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.read = read_file_beacon,
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.write = write_file_beacon,
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.open = ath5k_debugfs_open,
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.owner = THIS_MODULE,
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};
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/* debugfs: reset */
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static ssize_t write_file_reset(struct file *file,
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const char __user *userbuf,
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size_t count, loff_t *ppos)
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{
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struct ath5k_softc *sc = file->private_data;
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tasklet_schedule(&sc->restq);
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return count;
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}
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static const struct file_operations fops_reset = {
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.write = write_file_reset,
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.open = ath5k_debugfs_open,
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.owner = THIS_MODULE,
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};
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/* debugfs: debug level */
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static struct {
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enum ath5k_debug_level level;
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const char *name;
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const char *desc;
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} dbg_info[] = {
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{ ATH5K_DEBUG_RESET, "reset", "reset and initialization" },
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{ ATH5K_DEBUG_INTR, "intr", "interrupt handling" },
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{ ATH5K_DEBUG_MODE, "mode", "mode init/setup" },
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{ ATH5K_DEBUG_XMIT, "xmit", "basic xmit operation" },
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{ ATH5K_DEBUG_BEACON, "beacon", "beacon handling" },
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{ ATH5K_DEBUG_CALIBRATE, "calib", "periodic calibration" },
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{ ATH5K_DEBUG_TXPOWER, "txpower", "transmit power setting" },
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{ ATH5K_DEBUG_LED, "led", "LED mamagement" },
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{ ATH5K_DEBUG_DUMP_RX, "dumprx", "print received skb content" },
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{ ATH5K_DEBUG_DUMP_TX, "dumptx", "print transmit skb content" },
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{ ATH5K_DEBUG_DUMPBANDS, "dumpbands", "dump bands" },
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{ ATH5K_DEBUG_TRACE, "trace", "trace function calls" },
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{ ATH5K_DEBUG_ANY, "all", "show all debug levels" },
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};
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static ssize_t read_file_debug(struct file *file, char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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struct ath5k_softc *sc = file->private_data;
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char buf[700];
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unsigned int len = 0;
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unsigned int i;
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len += snprintf(buf+len, sizeof(buf)-len,
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"DEBUG LEVEL: 0x%08x\n\n", sc->debug.level);
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for (i = 0; i < ARRAY_SIZE(dbg_info) - 1; i++) {
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len += snprintf(buf+len, sizeof(buf)-len,
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"%10s %c 0x%08x - %s\n", dbg_info[i].name,
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sc->debug.level & dbg_info[i].level ? '+' : ' ',
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dbg_info[i].level, dbg_info[i].desc);
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}
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len += snprintf(buf+len, sizeof(buf)-len,
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"%10s %c 0x%08x - %s\n", dbg_info[i].name,
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sc->debug.level == dbg_info[i].level ? '+' : ' ',
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dbg_info[i].level, dbg_info[i].desc);
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return simple_read_from_buffer(user_buf, count, ppos, buf, len);
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}
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static ssize_t write_file_debug(struct file *file,
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const char __user *userbuf,
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size_t count, loff_t *ppos)
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{
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struct ath5k_softc *sc = file->private_data;
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unsigned int i;
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char buf[20];
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if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
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return -EFAULT;
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for (i = 0; i < ARRAY_SIZE(dbg_info); i++) {
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if (strncmp(buf, dbg_info[i].name,
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strlen(dbg_info[i].name)) == 0) {
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sc->debug.level ^= dbg_info[i].level; /* toggle bit */
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break;
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}
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}
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return count;
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}
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static const struct file_operations fops_debug = {
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.read = read_file_debug,
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.write = write_file_debug,
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.open = ath5k_debugfs_open,
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.owner = THIS_MODULE,
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};
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/* init */
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void
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ath5k_debug_init(void)
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{
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ath5k_global_debugfs = debugfs_create_dir("ath5k", NULL);
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}
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void
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ath5k_debug_init_device(struct ath5k_softc *sc)
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{
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sc->debug.level = ath5k_debug;
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sc->debug.debugfs_phydir = debugfs_create_dir(wiphy_name(sc->hw->wiphy),
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ath5k_global_debugfs);
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sc->debug.debugfs_debug = debugfs_create_file("debug", 0666,
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sc->debug.debugfs_phydir, sc, &fops_debug);
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sc->debug.debugfs_registers = debugfs_create_file("registers", 0444,
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sc->debug.debugfs_phydir, sc, &fops_registers);
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|
|
|
sc->debug.debugfs_tsf = debugfs_create_file("tsf", 0666,
|
|
sc->debug.debugfs_phydir, sc, &fops_tsf);
|
|
|
|
sc->debug.debugfs_beacon = debugfs_create_file("beacon", 0666,
|
|
sc->debug.debugfs_phydir, sc, &fops_beacon);
|
|
|
|
sc->debug.debugfs_reset = debugfs_create_file("reset", 0222,
|
|
sc->debug.debugfs_phydir, sc, &fops_reset);
|
|
}
|
|
|
|
void
|
|
ath5k_debug_finish(void)
|
|
{
|
|
debugfs_remove(ath5k_global_debugfs);
|
|
}
|
|
|
|
void
|
|
ath5k_debug_finish_device(struct ath5k_softc *sc)
|
|
{
|
|
debugfs_remove(sc->debug.debugfs_debug);
|
|
debugfs_remove(sc->debug.debugfs_registers);
|
|
debugfs_remove(sc->debug.debugfs_tsf);
|
|
debugfs_remove(sc->debug.debugfs_beacon);
|
|
debugfs_remove(sc->debug.debugfs_reset);
|
|
debugfs_remove(sc->debug.debugfs_phydir);
|
|
}
|
|
|
|
|
|
/* functions used in other places */
|
|
|
|
void
|
|
ath5k_debug_dump_bands(struct ath5k_softc *sc)
|
|
{
|
|
unsigned int b, i;
|
|
|
|
if (likely(!(sc->debug.level & ATH5K_DEBUG_DUMPBANDS)))
|
|
return;
|
|
|
|
BUG_ON(!sc->sbands);
|
|
|
|
for (b = 0; b < IEEE80211_NUM_BANDS; b++) {
|
|
struct ieee80211_supported_band *band = &sc->sbands[b];
|
|
char bname[5];
|
|
switch (band->band) {
|
|
case IEEE80211_BAND_2GHZ:
|
|
strcpy(bname, "2 GHz");
|
|
break;
|
|
case IEEE80211_BAND_5GHZ:
|
|
strcpy(bname, "5 GHz");
|
|
break;
|
|
default:
|
|
printk(KERN_DEBUG "Band not supported: %d\n",
|
|
band->band);
|
|
return;
|
|
}
|
|
printk(KERN_DEBUG "Band %s: channels %d, rates %d\n", bname,
|
|
band->n_channels, band->n_bitrates);
|
|
printk(KERN_DEBUG " channels:\n");
|
|
for (i = 0; i < band->n_channels; i++)
|
|
printk(KERN_DEBUG " %3d %d %.4x %.4x\n",
|
|
ieee80211_frequency_to_channel(
|
|
band->channels[i].center_freq),
|
|
band->channels[i].center_freq,
|
|
band->channels[i].hw_value,
|
|
band->channels[i].flags);
|
|
printk(KERN_DEBUG " rates:\n");
|
|
for (i = 0; i < band->n_bitrates; i++)
|
|
printk(KERN_DEBUG " %4d %.4x %.4x %.4x\n",
|
|
band->bitrates[i].bitrate,
|
|
band->bitrates[i].hw_value,
|
|
band->bitrates[i].flags,
|
|
band->bitrates[i].hw_value_short);
|
|
}
|
|
}
|
|
|
|
static inline void
|
|
ath5k_debug_printrxbuf(struct ath5k_buf *bf, int done,
|
|
struct ath5k_rx_status *rs)
|
|
{
|
|
struct ath5k_desc *ds = bf->desc;
|
|
struct ath5k_hw_all_rx_desc *rd = &ds->ud.ds_rx;
|
|
|
|
printk(KERN_DEBUG "R (%p %llx) %08x %08x %08x %08x %08x %08x %c\n",
|
|
ds, (unsigned long long)bf->daddr,
|
|
ds->ds_link, ds->ds_data,
|
|
rd->rx_ctl.rx_control_0, rd->rx_ctl.rx_control_1,
|
|
rd->u.rx_stat.rx_status_0, rd->u.rx_stat.rx_status_0,
|
|
!done ? ' ' : (rs->rs_status == 0) ? '*' : '!');
|
|
}
|
|
|
|
void
|
|
ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah)
|
|
{
|
|
struct ath5k_desc *ds;
|
|
struct ath5k_buf *bf;
|
|
struct ath5k_rx_status rs = {};
|
|
int status;
|
|
|
|
if (likely(!(sc->debug.level & ATH5K_DEBUG_RESET)))
|
|
return;
|
|
|
|
printk(KERN_DEBUG "rx queue %x, link %p\n",
|
|
ath5k_hw_get_rxdp(ah), sc->rxlink);
|
|
|
|
spin_lock_bh(&sc->rxbuflock);
|
|
list_for_each_entry(bf, &sc->rxbuf, list) {
|
|
ds = bf->desc;
|
|
status = ah->ah_proc_rx_desc(ah, ds, &rs);
|
|
if (!status)
|
|
ath5k_debug_printrxbuf(bf, status == 0, &rs);
|
|
}
|
|
spin_unlock_bh(&sc->rxbuflock);
|
|
}
|
|
|
|
void
|
|
ath5k_debug_dump_skb(struct ath5k_softc *sc,
|
|
struct sk_buff *skb, const char *prefix, int tx)
|
|
{
|
|
char buf[16];
|
|
|
|
if (likely(!((tx && (sc->debug.level & ATH5K_DEBUG_DUMP_TX)) ||
|
|
(!tx && (sc->debug.level & ATH5K_DEBUG_DUMP_RX)))))
|
|
return;
|
|
|
|
snprintf(buf, sizeof(buf), "%s %s", wiphy_name(sc->hw->wiphy), prefix);
|
|
|
|
print_hex_dump_bytes(buf, DUMP_PREFIX_NONE, skb->data,
|
|
min(200U, skb->len));
|
|
|
|
printk(KERN_DEBUG "\n");
|
|
}
|
|
|
|
void
|
|
ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf)
|
|
{
|
|
struct ath5k_desc *ds = bf->desc;
|
|
struct ath5k_hw_5212_tx_desc *td = &ds->ud.ds_tx5212;
|
|
struct ath5k_tx_status ts = {};
|
|
int done;
|
|
|
|
if (likely(!(sc->debug.level & ATH5K_DEBUG_RESET)))
|
|
return;
|
|
|
|
done = sc->ah->ah_proc_tx_desc(sc->ah, bf->desc, &ts);
|
|
|
|
printk(KERN_DEBUG "T (%p %llx) %08x %08x %08x %08x %08x %08x %08x "
|
|
"%08x %c\n", ds, (unsigned long long)bf->daddr, ds->ds_link,
|
|
ds->ds_data, td->tx_ctl.tx_control_0, td->tx_ctl.tx_control_1,
|
|
td->tx_ctl.tx_control_2, td->tx_ctl.tx_control_3,
|
|
td->tx_stat.tx_status_0, td->tx_stat.tx_status_1,
|
|
done ? ' ' : (ts.ts_status == 0) ? '*' : '!');
|
|
}
|
|
|
|
#endif /* ifdef CONFIG_ATH5K_DEBUG */
|