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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7bc9f038d0
When I was supporting Rpi Camera Module on the ASUS Tinker board, I found this driver have some issues with rockchip's mipi-csi driver. It didn't place clock lane in LP-11 state before performing D-PHY initialisation. >From our experience, on some OV sensors, LP-11 state is not achieved while BIT(5)-0x4800 is cleared. So let's set BIT(5) and BIT(0) both while not streaming, in order to coax the clock lane into LP-11 state. 0x4800 : MIPI CTRL 00 BIT(5) : clock lane gate enable 0: continuous 1: none-continuous BIT(0) : manually set clock lane 0: Not used 1: used Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> Reviewed-by: Luis Oliveira <lolivei@synopsys.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com> |
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| .. | ||
| cec | ||
| common | ||
| dvb-core | ||
| dvb-frontends | ||
| firewire | ||
| i2c | ||
| mmc | ||
| pci | ||
| platform | ||
| radio | ||
| rc | ||
| spi | ||
| tuners | ||
| usb | ||
| v4l2-core | ||
| Kconfig | ||
| Makefile | ||
| media-device.c | ||
| media-devnode.c | ||
| media-entity.c | ||