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bd82d4bd21
When using IRQ priority masking to disable interrupts, in order to deal
with the PSR.I state, local_irq_save() would convert the I bit into a
PMR value (GIC_PRIO_IRQOFF). This resulted in local_irq_restore()
potentially modifying the value of PMR in undesired location due to the
state of PSR.I upon flag saving [1].
In an attempt to solve this issue in a less hackish manner, introduce
a bit (GIC_PRIO_IGNORE_PMR) for the PMR values that can represent
whether PSR.I is being used to disable interrupts, in which case it
takes precedence of the status of interrupt masking via PMR.
GIC_PRIO_PSR_I_SET is chosen such that (<pmr_value> |
GIC_PRIO_PSR_I_SET) does not mask more interrupts than <pmr_value> as
some sections (e.g. arch_cpu_idle(), interrupt acknowledge path)
requires PMR not to mask interrupts that could be signaled to the
CPU when using only PSR.I.
[1] https://www.spinics.net/lists/arm-kernel/msg716956.html
Fixes:
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.. | ||
hyp | ||
debug.c | ||
fpsimd.c | ||
guest.c | ||
handle_exit.c | ||
hyp-init.S | ||
hyp.S | ||
inject_fault.c | ||
irq.h | ||
Kconfig | ||
Makefile | ||
pmu.c | ||
regmap.c | ||
reset.c | ||
sys_regs_generic_v8.c | ||
sys_regs.c | ||
sys_regs.h | ||
trace.h | ||
va_layout.c | ||
vgic-sys-reg-v3.c |