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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8de707aeb4
Implement device tree parsing to collect the available CMM instances described by the 'renesas,cmms' property. Associate CMMs with CRTCs and store a mask of active CMMs in the DU group for later enablement. Enforce the probe and suspend/resume ordering of DU and CMM by creating a stateless device link between the two. Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
124 lines
3.3 KiB
C
124 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* rcar_du_drv.h -- R-Car Display Unit DRM driver
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*
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* Copyright (C) 2013-2015 Renesas Electronics Corporation
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*/
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#ifndef __RCAR_DU_DRV_H__
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#define __RCAR_DU_DRV_H__
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#include <linux/kernel.h>
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#include <linux/wait.h>
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#include "rcar_cmm.h"
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#include "rcar_du_crtc.h"
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#include "rcar_du_group.h"
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#include "rcar_du_vsp.h"
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struct clk;
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struct device;
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struct drm_device;
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struct drm_property;
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struct rcar_du_device;
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struct rcar_du_encoder;
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#define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK BIT(0) /* Per-CRTC IRQ and clock */
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#define RCAR_DU_FEATURE_VSP1_SOURCE BIT(1) /* Has inputs from VSP1 */
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#define RCAR_DU_FEATURE_INTERLACED BIT(2) /* HW supports interlaced */
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#define RCAR_DU_FEATURE_TVM_SYNC BIT(3) /* Has TV switch/sync modes */
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#define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */
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/*
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* struct rcar_du_output_routing - Output routing specification
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* @possible_crtcs: bitmask of possible CRTCs for the output
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* @port: device tree port number corresponding to this output route
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*
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* The DU has 5 possible outputs (DPAD0/1, LVDS0/1, TCON). Output routing data
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* specify the valid SoC outputs, which CRTCs can drive the output, and the type
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* of in-SoC encoder for the output.
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*/
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struct rcar_du_output_routing {
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unsigned int possible_crtcs;
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unsigned int port;
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};
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/*
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* struct rcar_du_device_info - DU model-specific information
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* @gen: device generation (2 or 3)
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* @features: device features (RCAR_DU_FEATURE_*)
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* @quirks: device quirks (RCAR_DU_QUIRK_*)
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* @channels_mask: bit mask of available DU channels
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* @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*)
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* @num_lvds: number of internal LVDS encoders
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* @dpll_mask: bit mask of DU channels equipped with a DPLL
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* @lvds_clk_mask: bitmask of channels that can use the LVDS clock as dot clock
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*/
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struct rcar_du_device_info {
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unsigned int gen;
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unsigned int features;
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unsigned int quirks;
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unsigned int channels_mask;
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struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
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unsigned int num_lvds;
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unsigned int dpll_mask;
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unsigned int lvds_clk_mask;
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};
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#define RCAR_DU_MAX_CRTCS 4
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#define RCAR_DU_MAX_GROUPS DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2)
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#define RCAR_DU_MAX_VSPS 4
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struct rcar_du_device {
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struct device *dev;
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const struct rcar_du_device_info *info;
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void __iomem *mmio;
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struct drm_device *ddev;
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struct rcar_du_crtc crtcs[RCAR_DU_MAX_CRTCS];
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unsigned int num_crtcs;
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struct rcar_du_encoder *encoders[RCAR_DU_OUTPUT_MAX];
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struct rcar_du_group groups[RCAR_DU_MAX_GROUPS];
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struct platform_device *cmms[RCAR_DU_MAX_CRTCS];
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struct rcar_du_vsp vsps[RCAR_DU_MAX_VSPS];
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struct {
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struct drm_property *colorkey;
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} props;
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unsigned int dpad0_source;
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unsigned int dpad1_source;
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unsigned int vspd1_sink;
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};
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static inline bool rcar_du_has(struct rcar_du_device *rcdu,
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unsigned int feature)
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{
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return rcdu->info->features & feature;
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}
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static inline bool rcar_du_needs(struct rcar_du_device *rcdu,
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unsigned int quirk)
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{
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return rcdu->info->quirks & quirk;
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}
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static inline u32 rcar_du_read(struct rcar_du_device *rcdu, u32 reg)
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{
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return ioread32(rcdu->mmio + reg);
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}
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static inline void rcar_du_write(struct rcar_du_device *rcdu, u32 reg, u32 data)
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{
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iowrite32(data, rcdu->mmio + reg);
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}
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#endif /* __RCAR_DU_DRV_H__ */
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