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85082fd7cb
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (241 commits) [ARM] 5171/1: ep93xx: fix compilation of modules using clocks [ARM] 5133/2: at91sam9g20 defconfig file [ARM] 5130/4: Support for the at91sam9g20 [ARM] 5160/1: IOP3XX: gpio/gpiolib support [ARM] at91: Fix NAND FLASH timings for at91sam9x evaluation kits. [ARM] 5084/1: zylonite: Register AC97 device [ARM] 5085/2: PXA: Move AC97 over to the new central device declaration model [ARM] 5120/1: pxa: correct platform driver names for PXA25x and PXA27x UDC drivers [ARM] 5147/1: pxaficp_ir: drop pxa_gpio_mode calls, as pin setting [ARM] 5145/1: PXA2xx: provide api to control IrDA pins state [ARM] 5144/1: pxaficp_ir: cleanup includes [ARM] pxa: remove pxa_set_cken() [ARM] pxa: allow clk aliases [ARM] Feroceon: don't disable BPU on boot [ARM] Orion: LED support for HP mv2120 [ARM] Orion: add RD88F5181L-FXO support [ARM] Orion: add RD88F5181L-GE support [ARM] Orion: add Netgear WNR854T support [ARM] s3c2410_defconfig: update for current build [ARM] Acer n30: Minor style and indentation fixes. ...
324 lines
6.8 KiB
C
324 lines
6.8 KiB
C
/*
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* pxa2xx-i2s.c -- ALSA Soc Audio Layer
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*
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* Copyright 2005 Wolfson Microelectronics PLC.
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* Author: Liam Girdwood
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* liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include <asm/hardware.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/pxa2xx-gpio.h>
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#include <asm/arch/audio.h>
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#include "pxa2xx-pcm.h"
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#include "pxa2xx-i2s.h"
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struct pxa_i2s_port {
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u32 sadiv;
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u32 sacr0;
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u32 sacr1;
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u32 saimr;
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int master;
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u32 fmt;
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};
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static struct pxa_i2s_port pxa_i2s;
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static struct clk *clk_i2s;
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static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_out = {
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.name = "I2S PCM Stereo out",
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.dev_addr = __PREG(SADR),
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.drcmr = &DRCMRTXSADR,
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.dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
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DCMD_BURST32 | DCMD_WIDTH4,
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};
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static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_in = {
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.name = "I2S PCM Stereo in",
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.dev_addr = __PREG(SADR),
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.drcmr = &DRCMRRXSADR,
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.dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
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DCMD_BURST32 | DCMD_WIDTH4,
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};
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static struct pxa2xx_gpio gpio_bus[] = {
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{ /* I2S SoC Slave */
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.rx = GPIO29_SDATA_IN_I2S_MD,
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.tx = GPIO30_SDATA_OUT_I2S_MD,
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.clk = GPIO28_BITCLK_IN_I2S_MD,
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.frm = GPIO31_SYNC_I2S_MD,
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},
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{ /* I2S SoC Master */
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#ifdef CONFIG_PXA27x
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.sys = GPIO113_I2S_SYSCLK_MD,
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#else
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.sys = GPIO32_SYSCLK_I2S_MD,
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#endif
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.rx = GPIO29_SDATA_IN_I2S_MD,
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.tx = GPIO30_SDATA_OUT_I2S_MD,
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.clk = GPIO28_BITCLK_OUT_I2S_MD,
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.frm = GPIO31_SYNC_I2S_MD,
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},
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};
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static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
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clk_i2s = clk_get(NULL, "I2SCLK");
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if (IS_ERR(clk_i2s))
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return PTR_ERR(clk_i2s);
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if (!cpu_dai->active) {
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SACR0 |= SACR0_RST;
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SACR0 = 0;
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}
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return 0;
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}
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/* wait for I2S controller to be ready */
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static int pxa_i2s_wait(void)
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{
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int i;
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/* flush the Rx FIFO */
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for(i = 0; i < 16; i++)
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SADR;
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return 0;
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}
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static int pxa2xx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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unsigned int fmt)
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{
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/* interface format */
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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pxa_i2s.fmt = 0;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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pxa_i2s.fmt = SACR1_AMSL;
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break;
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}
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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pxa_i2s.master = 1;
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break;
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case SND_SOC_DAIFMT_CBM_CFS:
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pxa_i2s.master = 0;
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break;
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default:
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break;
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}
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return 0;
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}
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static int pxa2xx_i2s_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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int clk_id, unsigned int freq, int dir)
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{
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if (clk_id != PXA2XX_I2S_SYSCLK)
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return -ENODEV;
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if (pxa_i2s.master && dir == SND_SOC_CLOCK_OUT)
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pxa_gpio_mode(gpio_bus[pxa_i2s.master].sys);
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return 0;
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}
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static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
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pxa_gpio_mode(gpio_bus[pxa_i2s.master].rx);
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pxa_gpio_mode(gpio_bus[pxa_i2s.master].tx);
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pxa_gpio_mode(gpio_bus[pxa_i2s.master].frm);
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pxa_gpio_mode(gpio_bus[pxa_i2s.master].clk);
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clk_enable(clk_i2s);
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pxa_i2s_wait();
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_out;
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else
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cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_in;
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/* is port used by another stream */
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if (!(SACR0 & SACR0_ENB)) {
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SACR0 = 0;
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SACR1 = 0;
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if (pxa_i2s.master)
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SACR0 |= SACR0_BCKD;
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SACR0 |= SACR0_RFTH(14) | SACR0_TFTH(1);
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SACR1 |= pxa_i2s.fmt;
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}
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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SAIMR |= SAIMR_TFS;
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else
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SAIMR |= SAIMR_RFS;
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switch (params_rate(params)) {
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case 8000:
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SADIV = 0x48;
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break;
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case 11025:
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SADIV = 0x34;
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break;
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case 16000:
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SADIV = 0x24;
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break;
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case 22050:
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SADIV = 0x1a;
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break;
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case 44100:
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SADIV = 0xd;
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break;
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case 48000:
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SADIV = 0xc;
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break;
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case 96000: /* not in manual and possibly slightly inaccurate */
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SADIV = 0x6;
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break;
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}
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return 0;
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}
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static int pxa2xx_i2s_trigger(struct snd_pcm_substream *substream, int cmd)
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{
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int ret = 0;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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SACR0 |= SACR0_ENB;
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break;
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream)
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{
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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SACR1 |= SACR1_DRPL;
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SAIMR &= ~SAIMR_TFS;
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} else {
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SACR1 |= SACR1_DREC;
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SAIMR &= ~SAIMR_RFS;
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}
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if (SACR1 & (SACR1_DREC | SACR1_DRPL)) {
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SACR0 &= ~SACR0_ENB;
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pxa_i2s_wait();
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clk_disable(clk_i2s);
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}
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clk_put(clk_i2s);
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}
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#ifdef CONFIG_PM
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static int pxa2xx_i2s_suspend(struct platform_device *dev,
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struct snd_soc_dai *dai)
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{
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if (!dai->active)
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return 0;
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/* store registers */
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pxa_i2s.sacr0 = SACR0;
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pxa_i2s.sacr1 = SACR1;
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pxa_i2s.saimr = SAIMR;
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pxa_i2s.sadiv = SADIV;
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/* deactivate link */
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SACR0 &= ~SACR0_ENB;
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pxa_i2s_wait();
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return 0;
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}
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static int pxa2xx_i2s_resume(struct platform_device *pdev,
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struct snd_soc_dai *dai)
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{
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if (!dai->active)
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return 0;
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pxa_i2s_wait();
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SACR0 = pxa_i2s.sacr0 &= ~SACR0_ENB;
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SACR1 = pxa_i2s.sacr1;
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SAIMR = pxa_i2s.saimr;
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SADIV = pxa_i2s.sadiv;
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SACR0 |= SACR0_ENB;
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return 0;
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}
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#else
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#define pxa2xx_i2s_suspend NULL
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#define pxa2xx_i2s_resume NULL
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#endif
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#define PXA2XX_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
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SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
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SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000)
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struct snd_soc_dai pxa_i2s_dai = {
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.name = "pxa2xx-i2s",
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.id = 0,
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.type = SND_SOC_DAI_I2S,
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.suspend = pxa2xx_i2s_suspend,
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.resume = pxa2xx_i2s_resume,
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.playback = {
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.channels_min = 2,
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.channels_max = 2,
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.rates = PXA2XX_I2S_RATES,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,},
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.capture = {
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.channels_min = 2,
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.channels_max = 2,
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.rates = PXA2XX_I2S_RATES,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,},
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.ops = {
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.startup = pxa2xx_i2s_startup,
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.shutdown = pxa2xx_i2s_shutdown,
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.trigger = pxa2xx_i2s_trigger,
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.hw_params = pxa2xx_i2s_hw_params,},
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.dai_ops = {
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.set_fmt = pxa2xx_i2s_set_dai_fmt,
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.set_sysclk = pxa2xx_i2s_set_dai_sysclk,
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},
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};
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EXPORT_SYMBOL_GPL(pxa_i2s_dai);
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/* Module information */
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MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com");
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MODULE_DESCRIPTION("pxa2xx I2S SoC Interface");
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MODULE_LICENSE("GPL");
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