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f285144f81
The per-cpu preempt count of x86 contains two values, the actual preempt count and the inverted PREEMPT_NEED_RESCHED bit. If a corrupted preempt count is detected the preempt_count_set() function is used to reset the preempt count. In case the inverted PREEMPT_NEED_RESCHED bit is zero at the time of the reset, the preemption indication is lost. Use raw_cpu_cmpxchg_4() to reset only the count part and leave the PREEMPT_NEED_RESCHED bit as it is. This improves the kernel's behavior when it runs into preempt count leaks and tries to fix them up. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1478523660-733-1-git-send-email-schwidefsky@de.ibm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
120 lines
3.1 KiB
C
120 lines
3.1 KiB
C
#ifndef __ASM_PREEMPT_H
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#define __ASM_PREEMPT_H
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#include <asm/rmwcc.h>
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#include <asm/percpu.h>
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#include <linux/thread_info.h>
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DECLARE_PER_CPU(int, __preempt_count);
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/*
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* We use the PREEMPT_NEED_RESCHED bit as an inverted NEED_RESCHED such
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* that a decrement hitting 0 means we can and should reschedule.
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*/
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#define PREEMPT_ENABLED (0 + PREEMPT_NEED_RESCHED)
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/*
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* We mask the PREEMPT_NEED_RESCHED bit so as not to confuse all current users
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* that think a non-zero value indicates we cannot preempt.
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*/
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static __always_inline int preempt_count(void)
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{
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return raw_cpu_read_4(__preempt_count) & ~PREEMPT_NEED_RESCHED;
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}
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static __always_inline void preempt_count_set(int pc)
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{
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int old, new;
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do {
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old = raw_cpu_read_4(__preempt_count);
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new = (old & PREEMPT_NEED_RESCHED) |
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(pc & ~PREEMPT_NEED_RESCHED);
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} while (raw_cpu_cmpxchg_4(__preempt_count, old, new) != old);
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}
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/*
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* must be macros to avoid header recursion hell
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*/
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#define init_task_preempt_count(p) do { } while (0)
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#define init_idle_preempt_count(p, cpu) do { \
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per_cpu(__preempt_count, (cpu)) = PREEMPT_ENABLED; \
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} while (0)
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/*
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* We fold the NEED_RESCHED bit into the preempt count such that
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* preempt_enable() can decrement and test for needing to reschedule with a
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* single instruction.
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*
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* We invert the actual bit, so that when the decrement hits 0 we know we both
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* need to resched (the bit is cleared) and can resched (no preempt count).
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*/
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static __always_inline void set_preempt_need_resched(void)
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{
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raw_cpu_and_4(__preempt_count, ~PREEMPT_NEED_RESCHED);
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}
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static __always_inline void clear_preempt_need_resched(void)
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{
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raw_cpu_or_4(__preempt_count, PREEMPT_NEED_RESCHED);
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}
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static __always_inline bool test_preempt_need_resched(void)
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{
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return !(raw_cpu_read_4(__preempt_count) & PREEMPT_NEED_RESCHED);
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}
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/*
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* The various preempt_count add/sub methods
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*/
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static __always_inline void __preempt_count_add(int val)
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{
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raw_cpu_add_4(__preempt_count, val);
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}
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static __always_inline void __preempt_count_sub(int val)
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{
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raw_cpu_add_4(__preempt_count, -val);
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}
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/*
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* Because we keep PREEMPT_NEED_RESCHED set when we do _not_ need to reschedule
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* a decrement which hits zero means we have no preempt_count and should
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* reschedule.
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*/
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static __always_inline bool __preempt_count_dec_and_test(void)
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{
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GEN_UNARY_RMWcc("decl", __preempt_count, __percpu_arg(0), e);
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}
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/*
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* Returns true when we need to resched and can (barring IRQ state).
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*/
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static __always_inline bool should_resched(int preempt_offset)
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{
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return unlikely(raw_cpu_read_4(__preempt_count) == preempt_offset);
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}
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#ifdef CONFIG_PREEMPT
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extern asmlinkage void ___preempt_schedule(void);
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# define __preempt_schedule() \
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({ \
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register void *__sp asm(_ASM_SP); \
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asm volatile ("call ___preempt_schedule" : "+r"(__sp)); \
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})
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extern asmlinkage void preempt_schedule(void);
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extern asmlinkage void ___preempt_schedule_notrace(void);
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# define __preempt_schedule_notrace() \
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({ \
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register void *__sp asm(_ASM_SP); \
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asm volatile ("call ___preempt_schedule_notrace" : "+r"(__sp)); \
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})
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extern asmlinkage void preempt_schedule_notrace(void);
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#endif
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#endif /* __ASM_PREEMPT_H */
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