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8bd26e3a7e
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
This removes all the ARM uses of the __cpuinit macros from C code,
and all __CPUINIT from assembly code. It also had two ".previous"
section statements that were paired off against __CPUINIT
(aka .section ".cpuinit.text") that also get removed here.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
187 lines
4.6 KiB
C
187 lines
4.6 KiB
C
/*
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* SMP support for R-Mobile / SH-Mobile - r8a7779 portion
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*
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* Copyright (C) 2011 Renesas Solutions Corp.
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* Copyright (C) 2011 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <mach/common.h>
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#include <mach/r8a7779.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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#include <asm/smp_twd.h>
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#define AVECR IOMEM(0xfe700040)
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#define R8A7779_SCU_BASE 0xf0000000
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static struct r8a7779_pm_ch r8a7779_ch_cpu1 = {
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.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
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.chan_bit = 1, /* ARM1 */
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.isr_bit = 1, /* ARM1 */
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};
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static struct r8a7779_pm_ch r8a7779_ch_cpu2 = {
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.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
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.chan_bit = 2, /* ARM2 */
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.isr_bit = 2, /* ARM2 */
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};
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static struct r8a7779_pm_ch r8a7779_ch_cpu3 = {
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.chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
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.chan_bit = 3, /* ARM3 */
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.isr_bit = 3, /* ARM3 */
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};
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static struct r8a7779_pm_ch *r8a7779_ch_cpu[4] = {
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[1] = &r8a7779_ch_cpu1,
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[2] = &r8a7779_ch_cpu2,
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[3] = &r8a7779_ch_cpu3,
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};
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#ifdef CONFIG_HAVE_ARM_TWD
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static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, R8A7779_SCU_BASE + 0x600, 29);
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void __init r8a7779_register_twd(void)
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{
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twd_local_timer_register(&twd_local_timer);
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}
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#endif
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static int r8a7779_platform_cpu_kill(unsigned int cpu)
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{
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struct r8a7779_pm_ch *ch = NULL;
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int ret = -EIO;
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cpu = cpu_logical_map(cpu);
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if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
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ch = r8a7779_ch_cpu[cpu];
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if (ch)
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ret = r8a7779_sysc_power_down(ch);
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return ret ? ret : 1;
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}
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static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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struct r8a7779_pm_ch *ch = NULL;
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int ret = -EIO;
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cpu = cpu_logical_map(cpu);
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if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
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ch = r8a7779_ch_cpu[cpu];
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if (ch)
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ret = r8a7779_sysc_power_up(ch);
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return ret;
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}
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static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
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{
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scu_enable(shmobile_scu_base);
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/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
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__raw_writel(__pa(shmobile_boot_vector), AVECR);
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shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
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shmobile_boot_arg = (unsigned long)shmobile_scu_base;
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/* enable cache coherency on booting CPU */
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scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
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r8a7779_pm_init();
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/* power off secondary CPUs */
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r8a7779_platform_cpu_kill(1);
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r8a7779_platform_cpu_kill(2);
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r8a7779_platform_cpu_kill(3);
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}
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static void __init r8a7779_smp_init_cpus(void)
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{
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/* setup r8a7779 specific SCU base */
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shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
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shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int r8a7779_scu_psr_core_disabled(int cpu)
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{
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unsigned long mask = 3 << (cpu * 8);
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if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)
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return 1;
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return 0;
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}
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static int r8a7779_cpu_kill(unsigned int cpu)
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{
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int k;
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/* this function is running on another CPU than the offline target,
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* here we need wait for shutdown code in platform_cpu_die() to
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* finish before asking SoC-specific code to power off the CPU core.
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*/
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for (k = 0; k < 1000; k++) {
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if (r8a7779_scu_psr_core_disabled(cpu))
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return r8a7779_platform_cpu_kill(cpu);
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mdelay(1);
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}
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return 0;
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}
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static void r8a7779_cpu_die(unsigned int cpu)
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{
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dsb();
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flush_cache_all();
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/* disable cache coherency */
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scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
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/* Endless loop until power off from r8a7779_cpu_kill() */
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while (1)
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cpu_do_idle();
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}
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static int r8a7779_cpu_disable(unsigned int cpu)
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{
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/* only CPU1->3 have power domains, do not allow hotplug of CPU0 */
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return cpu == 0 ? -EPERM : 0;
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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struct smp_operations r8a7779_smp_ops __initdata = {
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.smp_init_cpus = r8a7779_smp_init_cpus,
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.smp_prepare_cpus = r8a7779_smp_prepare_cpus,
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.smp_boot_secondary = r8a7779_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_kill = r8a7779_cpu_kill,
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.cpu_die = r8a7779_cpu_die,
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.cpu_disable = r8a7779_cpu_disable,
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#endif
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};
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