Leo Yan 9fa7231b19 clk: hi6220: change watchdog clock source ... The old code uses tcxo (19.2MHz) as watchdog clock but actually the watchdog uses 32K clock, as result the watchdog timeout cannot be set correctly and delay long time to reset SoC. So this patch is to use 'ref32k' as clock source for watchdog. Fixes: 72ea48610d ("clk: hi6220: Clock driver support for Hisilicon hi6220 SoC") Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>		2017-08-31 18:32:43 -07:00
..
clk-hi3519.c
clk-hi3620.c	clk: hi3620: Fix a typo in one variable name	2017-04-19 11:29:49 -07:00
clk-hi3660.c	clk: hi3660: Set PPLL2 to 2880M	2017-06-19 19:02:41 -07:00
clk-hi6220-stub.c
clk-hi6220.c	clk: hi6220: change watchdog clock source	2017-08-31 18:32:43 -07:00
clk-hip04.c
clk-hix5hd2.c
clk.c	clk: hisilicon: Delete error messages for failed memory allocations in hisi_clk_init()	2017-04-19 10:45:52 -07:00
clk.h
clkdivider-hi6220.c
clkgate-separated.c	clk: hisilicon: fix lock assignment	2017-01-26 16:18:34 -08:00
crg-hi3516cv300.c
crg-hi3798cv200.c	clk: hisilicon: add usb2 clocks for hi3798cv200 SoC	2017-06-21 10:46:45 -07:00
crg.h
Kconfig	clk: hisilicon: Add clock driver for hi3660 SoC	2017-01-09 16:20:38 -08:00
Makefile	clk: hisilicon: Add clock driver for hi3660 SoC	2017-01-09 16:20:38 -08:00
reset.c
reset.h