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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e25f51d4f9
Change efuse routines for addition of RTL8192SE and RTL8192DE code Signed-off-by: Chaoming_Li <chaoming_li@realsil.com.cn> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
125 lines
3.3 KiB
C
125 lines
3.3 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2009-2010 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __RTL_EFUSE_H_
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#define __RTL_EFUSE_H_
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#define EFUSE_IC_ID_OFFSET 506
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#define EFUSE_REAL_CONTENT_LEN 512
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#define EFUSE_MAP_LEN 128
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#define EFUSE_MAX_WORD_UNIT 4
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#define EFUSE_INIT_MAP 0
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#define EFUSE_MODIFY_MAP 1
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#define PG_STATE_HEADER 0x01
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#define PG_STATE_WORD_0 0x02
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#define PG_STATE_WORD_1 0x04
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#define PG_STATE_WORD_2 0x08
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#define PG_STATE_WORD_3 0x10
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#define PG_STATE_DATA 0x20
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#define PG_SWBYTE_H 0x01
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#define PG_SWBYTE_L 0x02
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#define _POWERON_DELAY_
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#define _PRE_EXECUTE_READ_CMD_
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#define EFUSE_REPEAT_THRESHOLD_ 3
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#define EFUSE_ERROE_HANDLE 1
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struct efuse_map {
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u8 offset;
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u8 word_start;
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u8 byte_start;
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u8 byte_cnts;
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};
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struct pgpkt_struct {
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u8 offset;
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u8 word_en;
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u8 data[8];
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};
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enum efuse_data_item {
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EFUSE_CHIP_ID = 0,
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EFUSE_LDO_SETTING,
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EFUSE_CLK_SETTING,
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EFUSE_SDIO_SETTING,
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EFUSE_CCCR,
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EFUSE_SDIO_MODE,
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EFUSE_OCR,
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EFUSE_F0CIS,
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EFUSE_F1CIS,
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EFUSE_MAC_ADDR,
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EFUSE_EEPROM_VER,
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EFUSE_CHAN_PLAN,
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EFUSE_TXPW_TAB
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};
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enum {
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VOLTAGE_V25 = 0x03,
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LDOE25_SHIFT = 28,
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};
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struct efuse_priv {
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u8 id[2];
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u8 ldo_setting[2];
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u8 clk_setting[2];
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u8 cccr;
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u8 sdio_mode;
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u8 ocr[3];
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u8 cis0[17];
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u8 cis1[48];
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u8 mac_addr[6];
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u8 eeprom_verno;
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u8 channel_plan;
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u8 tx_power_b[14];
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u8 tx_power_g[14];
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};
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extern void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf);
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extern void efuse_initialize(struct ieee80211_hw *hw);
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extern u8 efuse_read_1byte(struct ieee80211_hw *hw, u16 address);
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extern void efuse_write_1byte(struct ieee80211_hw *hw, u16 address, u8 value);
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extern void read_efuse(struct ieee80211_hw *hw, u16 _offset,
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u16 _size_byte, u8 *pbuf);
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extern void efuse_shadow_read(struct ieee80211_hw *hw, u8 type,
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u16 offset, u32 *value);
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extern void efuse_shadow_write(struct ieee80211_hw *hw, u8 type,
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u16 offset, u32 value);
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extern bool efuse_shadow_update(struct ieee80211_hw *hw);
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extern bool efuse_shadow_update_chk(struct ieee80211_hw *hw);
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extern void rtl_efuse_shadow_map_update(struct ieee80211_hw *hw);
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extern void efuse_force_write_vendor_Id(struct ieee80211_hw *hw);
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extern void efuse_re_pg_section(struct ieee80211_hw *hw, u8 section_idx);
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#endif
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