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![]() H6 SoC has a "pio group withstand voltage mode" register (datasheet
description), that needs to be used to select either 1.8V or 3.3V I/O mode,
based on what voltage is powering the respective pin banks and is thus used
for I/O signals.
Add support for configuring this register according to the voltage of the
pin bank regulator (if enabled).
This is similar to the support for I/O bias voltage setting patch for A80
and the same concerns apply. See:
commit
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.. | ||
Kconfig | ||
Makefile | ||
pinctrl-sun4i-a10.c | ||
pinctrl-sun5i.c | ||
pinctrl-sun6i-a31-r.c | ||
pinctrl-sun6i-a31.c | ||
pinctrl-sun8i-a23-r.c | ||
pinctrl-sun8i-a23.c | ||
pinctrl-sun8i-a33.c | ||
pinctrl-sun8i-a83t-r.c | ||
pinctrl-sun8i-a83t.c | ||
pinctrl-sun8i-h3-r.c | ||
pinctrl-sun8i-h3.c | ||
pinctrl-sun8i-v3s.c | ||
pinctrl-sun9i-a80-r.c | ||
pinctrl-sun9i-a80.c | ||
pinctrl-sun50i-a64-r.c | ||
pinctrl-sun50i-a64.c | ||
pinctrl-sun50i-h5.c | ||
pinctrl-sun50i-h6-r.c | ||
pinctrl-sun50i-h6.c | ||
pinctrl-suniv-f1c100s.c | ||
pinctrl-sunxi.c | ||
pinctrl-sunxi.h |