mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 17:36:57 +07:00
64ae499cf2
- move pcieport_if.h to drivers/pci/pcie/ to encapsulate it (Frederick Lawler) - merge pcieport_if.h into portdrv.h (Bjorn Helgaas) - move workaround for BIOS PME issue from portdrv to PCI core (Bjorn Helgaas) - completely disable portdrv with "pcie_ports=compat" (Bjorn Helgaas) - remove portdrv link order dependency (Bjorn Helgaas) - remove support for unused VC portdrv service (Bjorn Helgaas) - simplify portdrv feature permission checking (Bjorn Helgaas) - remove "pcie_hp=nomsi" parameter (use "pci=nomsi" instead) (Bjorn Helgaas) - remove unnecessary "pcie_ports=auto" parameter (Bjorn Helgaas) - use cached AER capability offset (Frederick Lawler) - don't enable DPC if BIOS hasn't granted AER control (Mika Westerberg) - rename pcie-dpc.c to dpc.c (Bjorn Helgaas) * pci/portdrv: PCI/DPC: Rename from pcie-dpc.c to dpc.c PCI/DPC: Do not enable DPC if AER control is not allowed by the BIOS PCI/AER: Use cached AER Capability offset PCI/portdrv: Rename and reverse sense of pcie_ports_auto PCI/portdrv: Encapsulate pcie_ports_auto inside the port driver PCI/portdrv: Remove unnecessary "pcie_ports=auto" parameter PCI/portdrv: Remove "pcie_hp=nomsi" kernel parameter PCI/portdrv: Remove unnecessary include of <linux/pci-aspm.h> PCI/portdrv: Simplify PCIe feature permission checking PCI/portdrv: Remove unused PCIE_PORT_SERVICE_VC PCI/portdrv: Remove pcie_port_bus_type link order dependency PCI/portdrv: Disable port driver in compat mode PCI/PM: Clear PCIe PME Status bit for Root Complex Event Collectors PCI/PM: Clear PCIe PME Status bit in core, not PCIe port driver PCI/PM: Move pcie_clear_root_pme_status() to core PCI/portdrv: Merge pcieport_if.h into portdrv.h PCI/portdrv: Move pcieport_if.h to drivers/pci/pcie/ Conflicts: drivers/pci/pcie/Makefile drivers/pci/pcie/portdrv.h
116 lines
3.5 KiB
C
116 lines
3.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Purpose: PCI Express Port Bus Driver's Internal Data Structures
|
|
*
|
|
* Copyright (C) 2004 Intel
|
|
* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
|
|
*/
|
|
|
|
#ifndef _PORTDRV_H_
|
|
#define _PORTDRV_H_
|
|
|
|
#include <linux/compiler.h>
|
|
|
|
extern bool pcie_ports_native;
|
|
|
|
/* Service Type */
|
|
#define PCIE_PORT_SERVICE_PME_SHIFT 0 /* Power Management Event */
|
|
#define PCIE_PORT_SERVICE_PME (1 << PCIE_PORT_SERVICE_PME_SHIFT)
|
|
#define PCIE_PORT_SERVICE_AER_SHIFT 1 /* Advanced Error Reporting */
|
|
#define PCIE_PORT_SERVICE_AER (1 << PCIE_PORT_SERVICE_AER_SHIFT)
|
|
#define PCIE_PORT_SERVICE_HP_SHIFT 2 /* Native Hotplug */
|
|
#define PCIE_PORT_SERVICE_HP (1 << PCIE_PORT_SERVICE_HP_SHIFT)
|
|
#define PCIE_PORT_SERVICE_DPC_SHIFT 3 /* Downstream Port Containment */
|
|
#define PCIE_PORT_SERVICE_DPC (1 << PCIE_PORT_SERVICE_DPC_SHIFT)
|
|
|
|
#define PCIE_PORT_DEVICE_MAXSERVICES 4
|
|
|
|
/* Port Type */
|
|
#define PCIE_ANY_PORT (~0)
|
|
|
|
struct pcie_device {
|
|
int irq; /* Service IRQ/MSI/MSI-X Vector */
|
|
struct pci_dev *port; /* Root/Upstream/Downstream Port */
|
|
u32 service; /* Port service this device represents */
|
|
void *priv_data; /* Service Private Data */
|
|
struct device device; /* Generic Device Interface */
|
|
};
|
|
#define to_pcie_device(d) container_of(d, struct pcie_device, device)
|
|
|
|
static inline void set_service_data(struct pcie_device *dev, void *data)
|
|
{
|
|
dev->priv_data = data;
|
|
}
|
|
|
|
static inline void *get_service_data(struct pcie_device *dev)
|
|
{
|
|
return dev->priv_data;
|
|
}
|
|
|
|
struct pcie_port_service_driver {
|
|
const char *name;
|
|
int (*probe) (struct pcie_device *dev);
|
|
void (*remove) (struct pcie_device *dev);
|
|
int (*suspend) (struct pcie_device *dev);
|
|
int (*resume) (struct pcie_device *dev);
|
|
|
|
/* Device driver may resume normal operations */
|
|
void (*error_resume)(struct pci_dev *dev);
|
|
|
|
/* Link Reset Capability - AER service driver specific */
|
|
pci_ers_result_t (*reset_link) (struct pci_dev *dev);
|
|
|
|
int port_type; /* Type of the port this driver can handle */
|
|
u32 service; /* Port service this device represents */
|
|
|
|
struct device_driver driver;
|
|
};
|
|
#define to_service_driver(d) \
|
|
container_of(d, struct pcie_port_service_driver, driver)
|
|
|
|
int pcie_port_service_register(struct pcie_port_service_driver *new);
|
|
void pcie_port_service_unregister(struct pcie_port_service_driver *new);
|
|
|
|
/*
|
|
* The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must
|
|
* be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI
|
|
* supports a maximum of 32 vectors per function.
|
|
*/
|
|
#define PCIE_PORT_MAX_MSI_ENTRIES 32
|
|
|
|
#define get_descriptor_id(type, service) (((type - 4) << 8) | service)
|
|
|
|
extern struct bus_type pcie_port_bus_type;
|
|
int pcie_port_device_register(struct pci_dev *dev);
|
|
#ifdef CONFIG_PM
|
|
int pcie_port_device_suspend(struct device *dev);
|
|
int pcie_port_device_resume(struct device *dev);
|
|
#endif
|
|
void pcie_port_device_remove(struct pci_dev *dev);
|
|
int __must_check pcie_port_bus_register(void);
|
|
void pcie_port_bus_unregister(void);
|
|
|
|
struct pci_dev;
|
|
|
|
#ifdef CONFIG_PCIE_PME
|
|
extern bool pcie_pme_msi_disabled;
|
|
|
|
static inline void pcie_pme_disable_msi(void)
|
|
{
|
|
pcie_pme_msi_disabled = true;
|
|
}
|
|
|
|
static inline bool pcie_pme_no_msi(void)
|
|
{
|
|
return pcie_pme_msi_disabled;
|
|
}
|
|
|
|
void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
|
|
#else /* !CONFIG_PCIE_PME */
|
|
static inline void pcie_pme_disable_msi(void) {}
|
|
static inline bool pcie_pme_no_msi(void) { return false; }
|
|
static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {}
|
|
#endif /* !CONFIG_PCIE_PME */
|
|
|
|
#endif /* _PORTDRV_H_ */
|