mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2dafd63682
Compliance testing shows that HS Trail is off by -12%. Increase the HS Trail time to make this test pass. Signed-off-by: David Ung <davidu@nvidia.com> [treding@nvidia.com: update specification references, add comment] Signed-off-by: Thierry Reding <treding@nvidia.com>
138 lines
3.3 KiB
C
138 lines
3.3 KiB
C
/*
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* Copyright (C) 2013 NVIDIA Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include "mipi-phy.h"
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/*
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* Default D-PHY timings based on MIPI D-PHY specification. Derived from the
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* valid ranges specified in Section 6.9, Table 14, Page 40 of the D-PHY
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* specification (v1.2) with minor adjustments.
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*/
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int mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
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unsigned long period)
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{
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timing->clkmiss = 0;
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timing->clkpost = 70 + 52 * period;
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timing->clkpre = 8;
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timing->clkprepare = 65;
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timing->clksettle = 95;
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timing->clktermen = 0;
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timing->clktrail = 80;
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timing->clkzero = 260;
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timing->dtermen = 0;
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timing->eot = 0;
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timing->hsexit = 120;
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timing->hsprepare = 65 + 5 * period;
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timing->hszero = 145 + 5 * period;
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timing->hssettle = 85 + 6 * period;
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timing->hsskip = 40;
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/*
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* The MIPI D-PHY specification (Section 6.9, v1.2, Table 14, Page 40)
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* contains this formula as:
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*
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* T_HS-TRAIL = max(n * 8 * period, 60 + n * 4 * period)
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*
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* where n = 1 for forward-direction HS mode and n = 4 for reverse-
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* direction HS mode. There's only one setting and this function does
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* not parameterize on anything other that period, so this code will
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* assumes that reverse-direction HS mode is supported and uses n = 4.
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*/
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timing->hstrail = max(4 * 8 * period, 60 + 4 * 4 * period);
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timing->init = 100000;
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timing->lpx = 60;
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timing->taget = 5 * timing->lpx;
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timing->tago = 4 * timing->lpx;
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timing->tasure = 2 * timing->lpx;
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timing->wakeup = 1000000;
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return 0;
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}
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/*
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* Validate D-PHY timing according to MIPI D-PHY specification (v1.2, Section
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* Section 6.9 "Global Operation Timing Parameters").
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*/
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int mipi_dphy_timing_validate(struct mipi_dphy_timing *timing,
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unsigned long period)
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{
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if (timing->clkmiss > 60)
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return -EINVAL;
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if (timing->clkpost < (60 + 52 * period))
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return -EINVAL;
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if (timing->clkpre < 8)
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return -EINVAL;
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if (timing->clkprepare < 38 || timing->clkprepare > 95)
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return -EINVAL;
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if (timing->clksettle < 95 || timing->clksettle > 300)
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return -EINVAL;
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if (timing->clktermen > 38)
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return -EINVAL;
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if (timing->clktrail < 60)
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return -EINVAL;
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if (timing->clkprepare + timing->clkzero < 300)
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return -EINVAL;
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if (timing->dtermen > 35 + 4 * period)
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return -EINVAL;
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if (timing->eot > 105 + 12 * period)
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return -EINVAL;
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if (timing->hsexit < 100)
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return -EINVAL;
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if (timing->hsprepare < 40 + 4 * period ||
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timing->hsprepare > 85 + 6 * period)
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return -EINVAL;
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if (timing->hsprepare + timing->hszero < 145 + 10 * period)
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return -EINVAL;
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if ((timing->hssettle < 85 + 6 * period) ||
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(timing->hssettle > 145 + 10 * period))
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return -EINVAL;
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if (timing->hsskip < 40 || timing->hsskip > 55 + 4 * period)
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return -EINVAL;
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if (timing->hstrail < max(8 * period, 60 + 4 * period))
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return -EINVAL;
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if (timing->init < 100000)
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return -EINVAL;
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if (timing->lpx < 50)
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return -EINVAL;
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if (timing->taget != 5 * timing->lpx)
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return -EINVAL;
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if (timing->tago != 4 * timing->lpx)
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return -EINVAL;
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if (timing->tasure < timing->lpx || timing->tasure > 2 * timing->lpx)
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return -EINVAL;
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if (timing->wakeup < 1000000)
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return -EINVAL;
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return 0;
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}
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