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9a32299394
The bestcomm dma hardware, and some of its users like the FEC ethernet component, is used in different FreeScale parts, including non-powerpc parts like the ColdFire MCF547x & MCF548x families. Don't keep the driver hidden in arch/powerpc where it is inaccessible for other arches. .c files are moved to drivers/dma/bestcomm, while .h files are moved to include/linux/fsl/bestcomm. Makefiles, Kconfigs and #include directives are updated for the new file locations. Tested by recompiling for MPC5200 with all bestcomm users enabled. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Anatolij Gustschin <agust@denx.de>
271 lines
7.0 KiB
C
271 lines
7.0 KiB
C
/*
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* Bestcomm FEC tasks driver
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*
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*
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* Copyright (C) 2006-2007 Sylvain Munaut <tnt@246tNt.com>
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* Copyright (C) 2003-2004 MontaVista, Software, Inc.
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* ( by Dale Farnsworth <dfarnsworth@mvista.com> )
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <asm/io.h>
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#include <linux/fsl/bestcomm/bestcomm.h>
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#include <linux/fsl/bestcomm/bestcomm_priv.h>
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#include <linux/fsl/bestcomm/fec.h>
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/* ======================================================================== */
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/* Task image/var/inc */
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/* ======================================================================== */
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/* fec tasks images */
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extern u32 bcom_fec_rx_task[];
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extern u32 bcom_fec_tx_task[];
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/* rx task vars that need to be set before enabling the task */
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struct bcom_fec_rx_var {
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u32 enable; /* (u16*) address of task's control register */
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u32 fifo; /* (u32*) address of fec's fifo */
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u32 bd_base; /* (struct bcom_bd*) beginning of ring buffer */
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u32 bd_last; /* (struct bcom_bd*) end of ring buffer */
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u32 bd_start; /* (struct bcom_bd*) current bd */
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u32 buffer_size; /* size of receive buffer */
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};
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/* rx task incs that need to be set before enabling the task */
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struct bcom_fec_rx_inc {
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u16 pad0;
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s16 incr_bytes;
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u16 pad1;
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s16 incr_dst;
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u16 pad2;
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s16 incr_dst_ma;
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};
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/* tx task vars that need to be set before enabling the task */
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struct bcom_fec_tx_var {
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u32 DRD; /* (u32*) address of self-modified DRD */
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u32 fifo; /* (u32*) address of fec's fifo */
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u32 enable; /* (u16*) address of task's control register */
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u32 bd_base; /* (struct bcom_bd*) beginning of ring buffer */
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u32 bd_last; /* (struct bcom_bd*) end of ring buffer */
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u32 bd_start; /* (struct bcom_bd*) current bd */
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u32 buffer_size; /* set by uCode for each packet */
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};
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/* tx task incs that need to be set before enabling the task */
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struct bcom_fec_tx_inc {
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u16 pad0;
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s16 incr_bytes;
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u16 pad1;
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s16 incr_src;
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u16 pad2;
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s16 incr_src_ma;
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};
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/* private structure in the task */
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struct bcom_fec_priv {
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phys_addr_t fifo;
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int maxbufsize;
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};
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/* ======================================================================== */
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/* Task support code */
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/* ======================================================================== */
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struct bcom_task *
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bcom_fec_rx_init(int queue_len, phys_addr_t fifo, int maxbufsize)
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{
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struct bcom_task *tsk;
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struct bcom_fec_priv *priv;
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tsk = bcom_task_alloc(queue_len, sizeof(struct bcom_fec_bd),
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sizeof(struct bcom_fec_priv));
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if (!tsk)
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return NULL;
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tsk->flags = BCOM_FLAGS_NONE;
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priv = tsk->priv;
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priv->fifo = fifo;
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priv->maxbufsize = maxbufsize;
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if (bcom_fec_rx_reset(tsk)) {
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bcom_task_free(tsk);
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return NULL;
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}
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return tsk;
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}
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EXPORT_SYMBOL_GPL(bcom_fec_rx_init);
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int
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bcom_fec_rx_reset(struct bcom_task *tsk)
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{
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struct bcom_fec_priv *priv = tsk->priv;
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struct bcom_fec_rx_var *var;
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struct bcom_fec_rx_inc *inc;
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/* Shutdown the task */
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bcom_disable_task(tsk->tasknum);
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/* Reset the microcode */
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var = (struct bcom_fec_rx_var *) bcom_task_var(tsk->tasknum);
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inc = (struct bcom_fec_rx_inc *) bcom_task_inc(tsk->tasknum);
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if (bcom_load_image(tsk->tasknum, bcom_fec_rx_task))
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return -1;
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var->enable = bcom_eng->regs_base +
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offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);
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var->fifo = (u32) priv->fifo;
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var->bd_base = tsk->bd_pa;
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var->bd_last = tsk->bd_pa + ((tsk->num_bd-1) * tsk->bd_size);
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var->bd_start = tsk->bd_pa;
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var->buffer_size = priv->maxbufsize;
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inc->incr_bytes = -(s16)sizeof(u32); /* These should be in the */
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inc->incr_dst = sizeof(u32); /* task image, but we stick */
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inc->incr_dst_ma= sizeof(u8); /* to the official ones */
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/* Reset the BDs */
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tsk->index = 0;
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tsk->outdex = 0;
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memset(tsk->bd, 0x00, tsk->num_bd * tsk->bd_size);
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/* Configure some stuff */
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bcom_set_task_pragma(tsk->tasknum, BCOM_FEC_RX_BD_PRAGMA);
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bcom_set_task_auto_start(tsk->tasknum, tsk->tasknum);
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out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_FEC_RX], BCOM_IPR_FEC_RX);
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out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */
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return 0;
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}
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EXPORT_SYMBOL_GPL(bcom_fec_rx_reset);
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void
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bcom_fec_rx_release(struct bcom_task *tsk)
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{
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/* Nothing special for the FEC tasks */
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bcom_task_free(tsk);
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}
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EXPORT_SYMBOL_GPL(bcom_fec_rx_release);
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/* Return 2nd to last DRD */
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/* This is an ugly hack, but at least it's only done
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once at initialization */
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static u32 *self_modified_drd(int tasknum)
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{
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u32 *desc;
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int num_descs;
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int drd_count;
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int i;
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num_descs = bcom_task_num_descs(tasknum);
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desc = bcom_task_desc(tasknum) + num_descs - 1;
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drd_count = 0;
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for (i=0; i<num_descs; i++, desc--)
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if (bcom_desc_is_drd(*desc) && ++drd_count == 3)
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break;
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return desc;
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}
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struct bcom_task *
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bcom_fec_tx_init(int queue_len, phys_addr_t fifo)
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{
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struct bcom_task *tsk;
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struct bcom_fec_priv *priv;
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tsk = bcom_task_alloc(queue_len, sizeof(struct bcom_fec_bd),
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sizeof(struct bcom_fec_priv));
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if (!tsk)
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return NULL;
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tsk->flags = BCOM_FLAGS_ENABLE_TASK;
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priv = tsk->priv;
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priv->fifo = fifo;
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if (bcom_fec_tx_reset(tsk)) {
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bcom_task_free(tsk);
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return NULL;
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}
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return tsk;
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}
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EXPORT_SYMBOL_GPL(bcom_fec_tx_init);
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int
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bcom_fec_tx_reset(struct bcom_task *tsk)
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{
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struct bcom_fec_priv *priv = tsk->priv;
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struct bcom_fec_tx_var *var;
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struct bcom_fec_tx_inc *inc;
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/* Shutdown the task */
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bcom_disable_task(tsk->tasknum);
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/* Reset the microcode */
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var = (struct bcom_fec_tx_var *) bcom_task_var(tsk->tasknum);
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inc = (struct bcom_fec_tx_inc *) bcom_task_inc(tsk->tasknum);
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if (bcom_load_image(tsk->tasknum, bcom_fec_tx_task))
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return -1;
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var->enable = bcom_eng->regs_base +
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offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]);
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var->fifo = (u32) priv->fifo;
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var->DRD = bcom_sram_va2pa(self_modified_drd(tsk->tasknum));
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var->bd_base = tsk->bd_pa;
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var->bd_last = tsk->bd_pa + ((tsk->num_bd-1) * tsk->bd_size);
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var->bd_start = tsk->bd_pa;
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inc->incr_bytes = -(s16)sizeof(u32); /* These should be in the */
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inc->incr_src = sizeof(u32); /* task image, but we stick */
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inc->incr_src_ma= sizeof(u8); /* to the official ones */
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/* Reset the BDs */
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tsk->index = 0;
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tsk->outdex = 0;
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memset(tsk->bd, 0x00, tsk->num_bd * tsk->bd_size);
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/* Configure some stuff */
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bcom_set_task_pragma(tsk->tasknum, BCOM_FEC_TX_BD_PRAGMA);
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bcom_set_task_auto_start(tsk->tasknum, tsk->tasknum);
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out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_FEC_TX], BCOM_IPR_FEC_TX);
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out_be32(&bcom_eng->regs->IntPend, 1<<tsk->tasknum); /* Clear ints */
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return 0;
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}
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EXPORT_SYMBOL_GPL(bcom_fec_tx_reset);
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void
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bcom_fec_tx_release(struct bcom_task *tsk)
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{
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/* Nothing special for the FEC tasks */
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bcom_task_free(tsk);
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}
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EXPORT_SYMBOL_GPL(bcom_fec_tx_release);
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MODULE_DESCRIPTION("BestComm FEC tasks driver");
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MODULE_AUTHOR("Dale Farnsworth <dfarnsworth@mvista.com>");
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MODULE_LICENSE("GPL v2");
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