mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0f472d04f5
Finish up what commit c2febafc67
("mm: convert generic code to 5-level
paging") started while levelling up P4D huge mapping support at par with
PUD and PMD. A new arch call back arch_ioremap_p4d_supported() is added
which just maintains status quo (P4D huge map not supported) on x86,
arm64 and powerpc.
When HAVE_ARCH_HUGE_VMAP is enabled its just a simple check from the
arch about the support, hence runtime effects are minimal.
Link: http://lkml.kernel.org/r/1561699231-20991-1-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Michal Hocko <mhocko@kernel.org>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
179 lines
5.2 KiB
C
179 lines
5.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2006 PathScale, Inc. All Rights Reserved.
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*/
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#ifndef _LINUX_IO_H
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#define _LINUX_IO_H
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/bug.h>
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#include <linux/err.h>
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#include <asm/io.h>
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#include <asm/page.h>
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struct device;
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struct resource;
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__visible void __iowrite32_copy(void __iomem *to, const void *from, size_t count);
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void __ioread32_copy(void *to, const void __iomem *from, size_t count);
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void __iowrite64_copy(void __iomem *to, const void *from, size_t count);
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#ifdef CONFIG_MMU
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int ioremap_page_range(unsigned long addr, unsigned long end,
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phys_addr_t phys_addr, pgprot_t prot);
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#else
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static inline int ioremap_page_range(unsigned long addr, unsigned long end,
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phys_addr_t phys_addr, pgprot_t prot)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
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void __init ioremap_huge_init(void);
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int arch_ioremap_p4d_supported(void);
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int arch_ioremap_pud_supported(void);
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int arch_ioremap_pmd_supported(void);
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#else
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static inline void ioremap_huge_init(void) { }
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#endif
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/*
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* Managed iomap interface
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*/
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#ifdef CONFIG_HAS_IOPORT_MAP
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void __iomem * devm_ioport_map(struct device *dev, unsigned long port,
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unsigned int nr);
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void devm_ioport_unmap(struct device *dev, void __iomem *addr);
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#else
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static inline void __iomem *devm_ioport_map(struct device *dev,
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unsigned long port,
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unsigned int nr)
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{
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return NULL;
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}
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static inline void devm_ioport_unmap(struct device *dev, void __iomem *addr)
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{
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}
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#endif
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#define IOMEM_ERR_PTR(err) (__force void __iomem *)ERR_PTR(err)
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void __iomem *devm_ioremap(struct device *dev, resource_size_t offset,
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resource_size_t size);
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void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset,
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resource_size_t size);
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void __iomem *devm_ioremap_wc(struct device *dev, resource_size_t offset,
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resource_size_t size);
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void devm_iounmap(struct device *dev, void __iomem *addr);
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int check_signature(const volatile void __iomem *io_addr,
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const unsigned char *signature, int length);
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void devm_ioremap_release(struct device *dev, void *res);
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void *devm_memremap(struct device *dev, resource_size_t offset,
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size_t size, unsigned long flags);
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void devm_memunmap(struct device *dev, void *addr);
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void *__devm_memremap_pages(struct device *dev, struct resource *res);
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#ifdef CONFIG_PCI
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/*
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* The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and
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* Posting") mandate non-posted configuration transactions. There is
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* no ioremap API in the kernel that can guarantee non-posted write
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* semantics across arches so provide a default implementation for
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* mapping PCI config space that defaults to ioremap_nocache(); arches
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* should override it if they have memory mapping implementations that
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* guarantee non-posted writes semantics to make the memory mapping
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* compliant with the PCI specification.
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*/
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#ifndef pci_remap_cfgspace
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#define pci_remap_cfgspace pci_remap_cfgspace
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static inline void __iomem *pci_remap_cfgspace(phys_addr_t offset,
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size_t size)
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{
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return ioremap_nocache(offset, size);
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}
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#endif
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#endif
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/*
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* Some systems do not have legacy ISA devices.
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* /dev/port is not a valid interface on these systems.
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* So for those archs, <asm/io.h> should define the following symbol.
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*/
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#ifndef arch_has_dev_port
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#define arch_has_dev_port() (1)
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#endif
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/*
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* Some systems (x86 without PAT) have a somewhat reliable way to mark a
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* physical address range such that uncached mappings will actually
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* end up write-combining. This facility should be used in conjunction
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* with pgprot_writecombine, ioremap-wc, or set_memory_wc, since it has
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* no effect if the per-page mechanisms are functional.
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* (On x86 without PAT, these functions manipulate MTRRs.)
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*
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* arch_phys_del_wc(0) or arch_phys_del_wc(any error code) is guaranteed
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* to have no effect.
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*/
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#ifndef arch_phys_wc_add
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static inline int __must_check arch_phys_wc_add(unsigned long base,
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unsigned long size)
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{
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return 0; /* It worked (i.e. did nothing). */
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}
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static inline void arch_phys_wc_del(int handle)
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{
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}
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#define arch_phys_wc_add arch_phys_wc_add
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#ifndef arch_phys_wc_index
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static inline int arch_phys_wc_index(int handle)
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{
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return -1;
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}
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#define arch_phys_wc_index arch_phys_wc_index
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#endif
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#endif
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enum {
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/* See memremap() kernel-doc for usage description... */
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MEMREMAP_WB = 1 << 0,
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MEMREMAP_WT = 1 << 1,
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MEMREMAP_WC = 1 << 2,
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MEMREMAP_ENC = 1 << 3,
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MEMREMAP_DEC = 1 << 4,
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};
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void *memremap(resource_size_t offset, size_t size, unsigned long flags);
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void memunmap(void *addr);
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/*
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* On x86 PAT systems we have memory tracking that keeps track of
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* the allowed mappings on memory ranges. This tracking works for
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* all the in-kernel mapping APIs (ioremap*), but where the user
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* wishes to map a range from a physical device into user memory
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* the tracking won't be updated. This API is to be used by
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* drivers which remap physical device pages into userspace,
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* and wants to make sure they are mapped WC and not UC.
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*/
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#ifndef arch_io_reserve_memtype_wc
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static inline int arch_io_reserve_memtype_wc(resource_size_t base,
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resource_size_t size)
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{
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return 0;
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}
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static inline void arch_io_free_memtype_wc(resource_size_t base,
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resource_size_t size)
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{
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}
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#endif
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#endif /* _LINUX_IO_H */
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