mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 01:13:55 +07:00
ae32a5b321
Some clock control regsiter has bit to reset the cotroller. So before enable the clock, we need deassert the reset pin. Make use of reset controller framework to export reset interface for device drivers, then device driver can control the reset action. Signed-off-by: Chao Xie <chao.xie@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
100 lines
2.2 KiB
C
100 lines
2.2 KiB
C
#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/reset-controller.h>
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#include "reset.h"
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#define rcdev_to_unit(rcdev) container_of(rcdev, struct mmp_clk_reset_unit, rcdev)
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static int mmp_of_reset_xlate(struct reset_controller_dev *rcdev,
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const struct of_phandle_args *reset_spec)
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{
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struct mmp_clk_reset_unit *unit = rcdev_to_unit(rcdev);
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struct mmp_clk_reset_cell *cell;
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int i;
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if (WARN_ON(reset_spec->args_count != rcdev->of_reset_n_cells))
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return -EINVAL;
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for (i = 0; i < rcdev->nr_resets; i++) {
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cell = &unit->cells[i];
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if (cell->clk_id == reset_spec->args[0])
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break;
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}
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if (i == rcdev->nr_resets)
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return -EINVAL;
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return i;
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}
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static int mmp_clk_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct mmp_clk_reset_unit *unit = rcdev_to_unit(rcdev);
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struct mmp_clk_reset_cell *cell;
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unsigned long flags = 0;
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u32 val;
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cell = &unit->cells[id];
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if (cell->lock)
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spin_lock_irqsave(cell->lock, flags);
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val = readl(cell->reg);
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val |= cell->bits;
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writel(val, cell->reg);
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if (cell->lock)
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spin_unlock_irqrestore(cell->lock, flags);
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return 0;
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}
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static int mmp_clk_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct mmp_clk_reset_unit *unit = rcdev_to_unit(rcdev);
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struct mmp_clk_reset_cell *cell;
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unsigned long flags = 0;
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u32 val;
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cell = &unit->cells[id];
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if (cell->lock)
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spin_lock_irqsave(cell->lock, flags);
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val = readl(cell->reg);
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val &= ~cell->bits;
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writel(val, cell->reg);
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if (cell->lock)
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spin_unlock_irqrestore(cell->lock, flags);
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return 0;
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}
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static struct reset_control_ops mmp_clk_reset_ops = {
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.assert = mmp_clk_reset_assert,
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.deassert = mmp_clk_reset_deassert,
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};
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void mmp_clk_reset_register(struct device_node *np,
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struct mmp_clk_reset_cell *cells, int nr_resets)
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{
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struct mmp_clk_reset_unit *unit;
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unit = kzalloc(sizeof(*unit), GFP_KERNEL);
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if (!unit)
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return;
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unit->cells = cells;
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unit->rcdev.of_reset_n_cells = 1;
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unit->rcdev.nr_resets = nr_resets;
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unit->rcdev.ops = &mmp_clk_reset_ops;
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unit->rcdev.of_node = np;
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unit->rcdev.of_xlate = mmp_of_reset_xlate;
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reset_controller_register(&unit->rcdev);
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}
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