mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f384796c40
For addresses above 512TB we allocate additional mmu contexts. To make
it all easy, addresses above 512TB are handled with IR/DR=1 and with
stack frame setup.
The mmu_context_t is also updated to track the new extended_ids. To
support upto 4PB we need a total 8 contexts.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
[mpe: Minor formatting tweaks and comment wording, switch BUG to WARN
in get_ea_context().]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
267 lines
7.5 KiB
C
267 lines
7.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_POWERPC_MMU_CONTEXT_H
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#define __ASM_POWERPC_MMU_CONTEXT_H
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#ifdef __KERNEL__
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <asm/mmu.h>
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#include <asm/cputable.h>
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#include <asm/cputhreads.h>
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/*
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* Most if the context management is out of line
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*/
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extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
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extern void destroy_context(struct mm_struct *mm);
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#ifdef CONFIG_SPAPR_TCE_IOMMU
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struct mm_iommu_table_group_mem_t;
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extern int isolate_lru_page(struct page *page); /* from internal.h */
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extern bool mm_iommu_preregistered(struct mm_struct *mm);
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extern long mm_iommu_get(struct mm_struct *mm,
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unsigned long ua, unsigned long entries,
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struct mm_iommu_table_group_mem_t **pmem);
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extern long mm_iommu_put(struct mm_struct *mm,
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struct mm_iommu_table_group_mem_t *mem);
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extern void mm_iommu_init(struct mm_struct *mm);
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extern void mm_iommu_cleanup(struct mm_struct *mm);
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extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup(struct mm_struct *mm,
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unsigned long ua, unsigned long size);
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extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm(
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struct mm_struct *mm, unsigned long ua, unsigned long size);
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extern struct mm_iommu_table_group_mem_t *mm_iommu_find(struct mm_struct *mm,
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unsigned long ua, unsigned long entries);
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extern long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
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unsigned long ua, unsigned long *hpa);
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extern long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,
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unsigned long ua, unsigned long *hpa);
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extern long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem);
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extern void mm_iommu_mapped_dec(struct mm_iommu_table_group_mem_t *mem);
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#endif
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extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
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extern void set_context(unsigned long id, pgd_t *pgd);
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#ifdef CONFIG_PPC_BOOK3S_64
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extern void radix__switch_mmu_context(struct mm_struct *prev,
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struct mm_struct *next);
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static inline void switch_mmu_context(struct mm_struct *prev,
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struct mm_struct *next,
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struct task_struct *tsk)
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{
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if (radix_enabled())
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return radix__switch_mmu_context(prev, next);
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return switch_slb(tsk, next);
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}
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extern int hash__alloc_context_id(void);
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extern void hash__reserve_context_id(int id);
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extern void __destroy_context(int context_id);
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static inline void mmu_context_init(void) { }
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static inline int alloc_extended_context(struct mm_struct *mm,
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unsigned long ea)
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{
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int context_id;
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int index = ea >> MAX_EA_BITS_PER_CONTEXT;
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context_id = hash__alloc_context_id();
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if (context_id < 0)
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return context_id;
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VM_WARN_ON(mm->context.extended_id[index]);
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mm->context.extended_id[index] = context_id;
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return context_id;
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}
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static inline bool need_extra_context(struct mm_struct *mm, unsigned long ea)
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{
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int context_id;
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context_id = get_ea_context(&mm->context, ea);
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if (!context_id)
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return true;
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return false;
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}
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#else
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extern void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk);
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extern unsigned long __init_new_context(void);
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extern void __destroy_context(unsigned long context_id);
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extern void mmu_context_init(void);
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static inline int alloc_extended_context(struct mm_struct *mm,
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unsigned long ea)
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{
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/* non book3s_64 should never find this called */
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WARN_ON(1);
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return -ENOMEM;
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}
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static inline bool need_extra_context(struct mm_struct *mm, unsigned long ea)
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{
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return false;
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}
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#endif
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#if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) && defined(CONFIG_PPC_RADIX_MMU)
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extern void radix_kvm_prefetch_workaround(struct mm_struct *mm);
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#else
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static inline void radix_kvm_prefetch_workaround(struct mm_struct *mm) { }
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#endif
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extern void switch_cop(struct mm_struct *next);
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extern int use_cop(unsigned long acop, struct mm_struct *mm);
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extern void drop_cop(unsigned long acop, struct mm_struct *mm);
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#ifdef CONFIG_PPC_BOOK3S_64
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static inline void inc_mm_active_cpus(struct mm_struct *mm)
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{
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atomic_inc(&mm->context.active_cpus);
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}
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static inline void dec_mm_active_cpus(struct mm_struct *mm)
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{
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atomic_dec(&mm->context.active_cpus);
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}
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static inline void mm_context_add_copro(struct mm_struct *mm)
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{
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/*
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* If any copro is in use, increment the active CPU count
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* in order to force TLB invalidations to be global as to
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* propagate to the Nest MMU.
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*/
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if (atomic_inc_return(&mm->context.copros) == 1)
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inc_mm_active_cpus(mm);
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}
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static inline void mm_context_remove_copro(struct mm_struct *mm)
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{
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int c;
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c = atomic_dec_if_positive(&mm->context.copros);
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/* Detect imbalance between add and remove */
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WARN_ON(c < 0);
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/*
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* Need to broadcast a global flush of the full mm before
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* decrementing active_cpus count, as the next TLBI may be
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* local and the nMMU and/or PSL need to be cleaned up.
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* Should be rare enough so that it's acceptable.
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*
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* Skip on hash, as we don't know how to do the proper flush
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* for the time being. Invalidations will remain global if
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* used on hash.
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*/
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if (c == 0 && radix_enabled()) {
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flush_all_mm(mm);
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dec_mm_active_cpus(mm);
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}
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}
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#else
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static inline void inc_mm_active_cpus(struct mm_struct *mm) { }
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static inline void dec_mm_active_cpus(struct mm_struct *mm) { }
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static inline void mm_context_add_copro(struct mm_struct *mm) { }
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static inline void mm_context_remove_copro(struct mm_struct *mm) { }
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#endif
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extern void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk);
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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unsigned long flags;
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local_irq_save(flags);
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switch_mm_irqs_off(prev, next, tsk);
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local_irq_restore(flags);
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}
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#define switch_mm_irqs_off switch_mm_irqs_off
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#define deactivate_mm(tsk,mm) do { } while (0)
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/*
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* After we have set current->mm to a new value, this activates
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* the context for the new mm so we see the new mappings.
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*/
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static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
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{
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switch_mm(prev, next, current);
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}
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/* We don't currently use enter_lazy_tlb() for anything */
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static inline void enter_lazy_tlb(struct mm_struct *mm,
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struct task_struct *tsk)
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{
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/* 64-bit Book3E keeps track of current PGD in the PACA */
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#ifdef CONFIG_PPC_BOOK3E_64
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get_paca()->pgd = NULL;
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#endif
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}
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static inline int arch_dup_mmap(struct mm_struct *oldmm,
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struct mm_struct *mm)
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{
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return 0;
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}
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#ifndef CONFIG_PPC_BOOK3S_64
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static inline void arch_exit_mmap(struct mm_struct *mm)
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{
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}
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#else
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extern void arch_exit_mmap(struct mm_struct *mm);
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#endif
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static inline void arch_unmap(struct mm_struct *mm,
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struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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if (start <= mm->context.vdso_base && mm->context.vdso_base < end)
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mm->context.vdso_base = 0;
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}
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static inline void arch_bprm_mm_init(struct mm_struct *mm,
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struct vm_area_struct *vma)
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{
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}
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#ifdef CONFIG_PPC_MEM_KEYS
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bool arch_vma_access_permitted(struct vm_area_struct *vma, bool write,
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bool execute, bool foreign);
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#else /* CONFIG_PPC_MEM_KEYS */
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static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,
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bool write, bool execute, bool foreign)
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{
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/* by default, allow everything */
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return true;
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}
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#define pkey_mm_init(mm)
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#define thread_pkey_regs_save(thread)
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#define thread_pkey_regs_restore(new_thread, old_thread)
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#define thread_pkey_regs_init(thread)
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static inline int vma_pkey(struct vm_area_struct *vma)
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{
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return 0;
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}
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static inline u64 pte_to_hpte_pkey_bits(u64 pteflags)
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{
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return 0x0UL;
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}
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#endif /* CONFIG_PPC_MEM_KEYS */
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#endif /* __KERNEL__ */
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#endif /* __ASM_POWERPC_MMU_CONTEXT_H */
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