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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7810927760
There is also a form of mtmsr where all bits need to be addressed. While the PPC64 Linux kernel behaves resonably well here, on PPC32 we do not have an L=1 form. It does mtmsr even for simple things like only changing EE. So we need to hook into that one as well and check for a mask of bits that we deem safe to change from within guest context. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
207 lines
5.1 KiB
ArmAsm
207 lines
5.1 KiB
ArmAsm
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright SUSE Linux Products GmbH 2010
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*
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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#include <asm/ppc_asm.h>
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#include <asm/kvm_asm.h>
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#include <asm/reg.h>
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#include <asm/page.h>
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#include <asm/asm-offsets.h>
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/* Hypercall entry point. Will be patched with device tree instructions. */
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.global kvm_hypercall_start
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kvm_hypercall_start:
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li r3, -1
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nop
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nop
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nop
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blr
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#define KVM_MAGIC_PAGE (-4096)
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#ifdef CONFIG_64BIT
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#define LL64(reg, offs, reg2) ld reg, (offs)(reg2)
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#define STL64(reg, offs, reg2) std reg, (offs)(reg2)
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#else
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#define LL64(reg, offs, reg2) lwz reg, (offs + 4)(reg2)
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#define STL64(reg, offs, reg2) stw reg, (offs + 4)(reg2)
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#endif
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#define SCRATCH_SAVE \
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/* Enable critical section. We are critical if \
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shared->critical == r1 */ \
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STL64(r1, KVM_MAGIC_PAGE + KVM_MAGIC_CRITICAL, 0); \
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\
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/* Save state */ \
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PPC_STL r31, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH1)(0); \
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PPC_STL r30, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH2)(0); \
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mfcr r31; \
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stw r31, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH3)(0);
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#define SCRATCH_RESTORE \
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/* Restore state */ \
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PPC_LL r31, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH1)(0); \
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lwz r30, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH3)(0); \
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mtcr r30; \
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PPC_LL r30, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH2)(0); \
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\
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/* Disable critical section. We are critical if \
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shared->critical == r1 and r2 is always != r1 */ \
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STL64(r2, KVM_MAGIC_PAGE + KVM_MAGIC_CRITICAL, 0);
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.global kvm_emulate_mtmsrd
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kvm_emulate_mtmsrd:
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SCRATCH_SAVE
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/* Put MSR & ~(MSR_EE|MSR_RI) in r31 */
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LL64(r31, KVM_MAGIC_PAGE + KVM_MAGIC_MSR, 0)
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lis r30, (~(MSR_EE | MSR_RI))@h
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ori r30, r30, (~(MSR_EE | MSR_RI))@l
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and r31, r31, r30
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/* OR the register's (MSR_EE|MSR_RI) on MSR */
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kvm_emulate_mtmsrd_reg:
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andi. r30, r0, (MSR_EE|MSR_RI)
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or r31, r31, r30
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/* Put MSR back into magic page */
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STL64(r31, KVM_MAGIC_PAGE + KVM_MAGIC_MSR, 0)
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/* Check if we have to fetch an interrupt */
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lwz r31, (KVM_MAGIC_PAGE + KVM_MAGIC_INT)(0)
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cmpwi r31, 0
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beq+ no_check
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/* Check if we may trigger an interrupt */
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andi. r30, r30, MSR_EE
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beq no_check
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SCRATCH_RESTORE
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/* Nag hypervisor */
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tlbsync
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b kvm_emulate_mtmsrd_branch
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no_check:
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SCRATCH_RESTORE
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/* Go back to caller */
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kvm_emulate_mtmsrd_branch:
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b .
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kvm_emulate_mtmsrd_end:
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.global kvm_emulate_mtmsrd_branch_offs
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kvm_emulate_mtmsrd_branch_offs:
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.long (kvm_emulate_mtmsrd_branch - kvm_emulate_mtmsrd) / 4
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.global kvm_emulate_mtmsrd_reg_offs
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kvm_emulate_mtmsrd_reg_offs:
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.long (kvm_emulate_mtmsrd_reg - kvm_emulate_mtmsrd) / 4
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.global kvm_emulate_mtmsrd_len
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kvm_emulate_mtmsrd_len:
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.long (kvm_emulate_mtmsrd_end - kvm_emulate_mtmsrd) / 4
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#define MSR_SAFE_BITS (MSR_EE | MSR_CE | MSR_ME | MSR_RI)
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#define MSR_CRITICAL_BITS ~MSR_SAFE_BITS
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.global kvm_emulate_mtmsr
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kvm_emulate_mtmsr:
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SCRATCH_SAVE
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/* Fetch old MSR in r31 */
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LL64(r31, KVM_MAGIC_PAGE + KVM_MAGIC_MSR, 0)
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/* Find the changed bits between old and new MSR */
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kvm_emulate_mtmsr_reg1:
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xor r31, r0, r31
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/* Check if we need to really do mtmsr */
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LOAD_REG_IMMEDIATE(r30, MSR_CRITICAL_BITS)
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and. r31, r31, r30
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/* No critical bits changed? Maybe we can stay in the guest. */
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beq maybe_stay_in_guest
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do_mtmsr:
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SCRATCH_RESTORE
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/* Just fire off the mtmsr if it's critical */
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kvm_emulate_mtmsr_orig_ins:
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mtmsr r0
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b kvm_emulate_mtmsr_branch
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maybe_stay_in_guest:
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/* Check if we have to fetch an interrupt */
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lwz r31, (KVM_MAGIC_PAGE + KVM_MAGIC_INT)(0)
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cmpwi r31, 0
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beq+ no_mtmsr
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/* Check if we may trigger an interrupt */
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kvm_emulate_mtmsr_reg2:
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andi. r31, r0, MSR_EE
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beq no_mtmsr
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b do_mtmsr
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no_mtmsr:
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/* Put MSR into magic page because we don't call mtmsr */
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kvm_emulate_mtmsr_reg3:
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STL64(r0, KVM_MAGIC_PAGE + KVM_MAGIC_MSR, 0)
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SCRATCH_RESTORE
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/* Go back to caller */
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kvm_emulate_mtmsr_branch:
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b .
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kvm_emulate_mtmsr_end:
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.global kvm_emulate_mtmsr_branch_offs
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kvm_emulate_mtmsr_branch_offs:
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.long (kvm_emulate_mtmsr_branch - kvm_emulate_mtmsr) / 4
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.global kvm_emulate_mtmsr_reg1_offs
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kvm_emulate_mtmsr_reg1_offs:
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.long (kvm_emulate_mtmsr_reg1 - kvm_emulate_mtmsr) / 4
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.global kvm_emulate_mtmsr_reg2_offs
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kvm_emulate_mtmsr_reg2_offs:
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.long (kvm_emulate_mtmsr_reg2 - kvm_emulate_mtmsr) / 4
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.global kvm_emulate_mtmsr_reg3_offs
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kvm_emulate_mtmsr_reg3_offs:
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.long (kvm_emulate_mtmsr_reg3 - kvm_emulate_mtmsr) / 4
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.global kvm_emulate_mtmsr_orig_ins_offs
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kvm_emulate_mtmsr_orig_ins_offs:
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.long (kvm_emulate_mtmsr_orig_ins - kvm_emulate_mtmsr) / 4
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.global kvm_emulate_mtmsr_len
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kvm_emulate_mtmsr_len:
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.long (kvm_emulate_mtmsr_end - kvm_emulate_mtmsr) / 4
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