mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 04:36:40 +07:00
7e2a4dc5c1
Drop definition of frequencies that only map from one number to the same number. This is not needed and if misused can hide bugs. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
158 lines
5.3 KiB
C
158 lines
5.3 KiB
C
/*
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* tlv320aic32x4.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _TLV320AIC32X4_H
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#define _TLV320AIC32X4_H
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struct device;
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struct regmap_config;
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extern const struct regmap_config aic32x4_regmap_config;
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int aic32x4_probe(struct device *dev, struct regmap *regmap);
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int aic32x4_remove(struct device *dev);
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/* tlv320aic32x4 register space (in decimal to match datasheet) */
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#define AIC32X4_REG(page, reg) ((page * 128) + reg)
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#define AIC32X4_PSEL AIC32X4_REG(0, 0)
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#define AIC32X4_RESET AIC32X4_REG(0, 1)
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#define AIC32X4_CLKMUX AIC32X4_REG(0, 4)
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#define AIC32X4_PLLPR AIC32X4_REG(0, 5)
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#define AIC32X4_PLLJ AIC32X4_REG(0, 6)
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#define AIC32X4_PLLDMSB AIC32X4_REG(0, 7)
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#define AIC32X4_PLLDLSB AIC32X4_REG(0, 8)
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#define AIC32X4_NDAC AIC32X4_REG(0, 11)
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#define AIC32X4_MDAC AIC32X4_REG(0, 12)
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#define AIC32X4_DOSRMSB AIC32X4_REG(0, 13)
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#define AIC32X4_DOSRLSB AIC32X4_REG(0, 14)
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#define AIC32X4_NADC AIC32X4_REG(0, 18)
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#define AIC32X4_MADC AIC32X4_REG(0, 19)
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#define AIC32X4_AOSR AIC32X4_REG(0, 20)
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#define AIC32X4_CLKMUX2 AIC32X4_REG(0, 25)
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#define AIC32X4_CLKOUTM AIC32X4_REG(0, 26)
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#define AIC32X4_IFACE1 AIC32X4_REG(0, 27)
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#define AIC32X4_IFACE2 AIC32X4_REG(0, 28)
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#define AIC32X4_IFACE3 AIC32X4_REG(0, 29)
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#define AIC32X4_BCLKN AIC32X4_REG(0, 30)
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#define AIC32X4_IFACE4 AIC32X4_REG(0, 31)
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#define AIC32X4_IFACE5 AIC32X4_REG(0, 32)
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#define AIC32X4_IFACE6 AIC32X4_REG(0, 33)
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#define AIC32X4_GPIOCTL AIC32X4_REG(0, 52)
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#define AIC32X4_DOUTCTL AIC32X4_REG(0, 53)
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#define AIC32X4_DINCTL AIC32X4_REG(0, 54)
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#define AIC32X4_MISOCTL AIC32X4_REG(0, 55)
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#define AIC32X4_SCLKCTL AIC32X4_REG(0, 56)
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#define AIC32X4_DACSPB AIC32X4_REG(0, 60)
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#define AIC32X4_ADCSPB AIC32X4_REG(0, 61)
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#define AIC32X4_DACSETUP AIC32X4_REG(0, 63)
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#define AIC32X4_DACMUTE AIC32X4_REG(0, 64)
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#define AIC32X4_LDACVOL AIC32X4_REG(0, 65)
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#define AIC32X4_RDACVOL AIC32X4_REG(0, 66)
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#define AIC32X4_ADCSETUP AIC32X4_REG(0, 81)
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#define AIC32X4_ADCFGA AIC32X4_REG(0, 82)
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#define AIC32X4_LADCVOL AIC32X4_REG(0, 83)
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#define AIC32X4_RADCVOL AIC32X4_REG(0, 84)
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#define AIC32X4_LAGC1 AIC32X4_REG(0, 86)
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#define AIC32X4_LAGC2 AIC32X4_REG(0, 87)
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#define AIC32X4_LAGC3 AIC32X4_REG(0, 88)
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#define AIC32X4_LAGC4 AIC32X4_REG(0, 89)
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#define AIC32X4_LAGC5 AIC32X4_REG(0, 90)
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#define AIC32X4_LAGC6 AIC32X4_REG(0, 91)
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#define AIC32X4_LAGC7 AIC32X4_REG(0, 92)
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#define AIC32X4_RAGC1 AIC32X4_REG(0, 94)
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#define AIC32X4_RAGC2 AIC32X4_REG(0, 95)
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#define AIC32X4_RAGC3 AIC32X4_REG(0, 96)
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#define AIC32X4_RAGC4 AIC32X4_REG(0, 97)
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#define AIC32X4_RAGC5 AIC32X4_REG(0, 98)
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#define AIC32X4_RAGC6 AIC32X4_REG(0, 99)
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#define AIC32X4_RAGC7 AIC32X4_REG(0, 100)
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#define AIC32X4_PWRCFG AIC32X4_REG(1, 1)
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#define AIC32X4_LDOCTL AIC32X4_REG(1, 2)
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#define AIC32X4_OUTPWRCTL AIC32X4_REG(1, 9)
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#define AIC32X4_CMMODE AIC32X4_REG(1, 10)
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#define AIC32X4_HPLROUTE AIC32X4_REG(1, 12)
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#define AIC32X4_HPRROUTE AIC32X4_REG(1, 13)
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#define AIC32X4_LOLROUTE AIC32X4_REG(1, 14)
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#define AIC32X4_LORROUTE AIC32X4_REG(1, 15)
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#define AIC32X4_HPLGAIN AIC32X4_REG(1, 16)
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#define AIC32X4_HPRGAIN AIC32X4_REG(1, 17)
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#define AIC32X4_LOLGAIN AIC32X4_REG(1, 18)
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#define AIC32X4_LORGAIN AIC32X4_REG(1, 19)
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#define AIC32X4_HEADSTART AIC32X4_REG(1, 20)
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#define AIC32X4_MICBIAS AIC32X4_REG(1, 51)
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#define AIC32X4_LMICPGAPIN AIC32X4_REG(1, 52)
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#define AIC32X4_LMICPGANIN AIC32X4_REG(1, 54)
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#define AIC32X4_RMICPGAPIN AIC32X4_REG(1, 55)
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#define AIC32X4_RMICPGANIN AIC32X4_REG(1, 57)
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#define AIC32X4_FLOATINGINPUT AIC32X4_REG(1, 58)
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#define AIC32X4_LMICPGAVOL AIC32X4_REG(1, 59)
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#define AIC32X4_RMICPGAVOL AIC32X4_REG(1, 60)
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#define AIC32X4_WORD_LEN_16BITS 0x00
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#define AIC32X4_WORD_LEN_20BITS 0x01
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#define AIC32X4_WORD_LEN_24BITS 0x02
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#define AIC32X4_WORD_LEN_32BITS 0x03
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#define AIC32X4_LADC_EN (1 << 7)
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#define AIC32X4_RADC_EN (1 << 6)
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#define AIC32X4_I2S_MODE 0x00
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#define AIC32X4_DSP_MODE 0x01
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#define AIC32X4_RIGHT_JUSTIFIED_MODE 0x02
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#define AIC32X4_LEFT_JUSTIFIED_MODE 0x03
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#define AIC32X4_AVDDWEAKDISABLE 0x08
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#define AIC32X4_LDOCTLEN 0x01
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#define AIC32X4_LDOIN_18_36 0x01
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#define AIC32X4_LDOIN2HP 0x02
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#define AIC32X4_DACSPBLOCK_MASK 0x1f
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#define AIC32X4_ADCSPBLOCK_MASK 0x1f
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#define AIC32X4_PLLJ_SHIFT 6
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#define AIC32X4_DOSRMSB_SHIFT 4
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#define AIC32X4_PLLCLKIN 0x03
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#define AIC32X4_MICBIAS_LDOIN 0x08
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#define AIC32X4_MICBIAS_2075V 0x60
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#define AIC32X4_LMICPGANIN_IN2R_10K 0x10
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#define AIC32X4_LMICPGANIN_CM1L_10K 0x40
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#define AIC32X4_RMICPGANIN_IN1L_10K 0x10
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#define AIC32X4_RMICPGANIN_CM1R_10K 0x40
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#define AIC32X4_LMICPGAVOL_NOGAIN 0x80
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#define AIC32X4_RMICPGAVOL_NOGAIN 0x80
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#define AIC32X4_BCLKMASTER 0x08
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#define AIC32X4_WCLKMASTER 0x04
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#define AIC32X4_PLLEN (0x01 << 7)
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#define AIC32X4_NDACEN (0x01 << 7)
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#define AIC32X4_MDACEN (0x01 << 7)
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#define AIC32X4_NADCEN (0x01 << 7)
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#define AIC32X4_MADCEN (0x01 << 7)
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#define AIC32X4_BCLKEN (0x01 << 7)
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#define AIC32X4_DACEN (0x03 << 6)
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#define AIC32X4_RDAC2LCHN (0x02 << 2)
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#define AIC32X4_LDAC2RCHN (0x02 << 4)
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#define AIC32X4_LDAC2LCHN (0x01 << 4)
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#define AIC32X4_RDAC2RCHN (0x01 << 2)
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#define AIC32X4_DAC_CHAN_MASK 0x3c
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#define AIC32X4_SSTEP2WCLK 0x01
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#define AIC32X4_MUTEON 0x0C
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#define AIC32X4_DACMOD2BCLK 0x01
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#endif /* _TLV320AIC32X4_H */
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