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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
274 lines
6.4 KiB
C
274 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2017 IBM Corp.
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*/
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#include <linux/hugetlb.h>
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#include <linux/sched/mm.h>
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#include <asm/pnv-pci.h>
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#include <misc/cxllib.h>
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#include "cxl.h"
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#define CXL_INVALID_DRA ~0ull
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#define CXL_DUMMY_READ_SIZE 128
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#define CXL_DUMMY_READ_ALIGN 8
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#define CXL_CAPI_WINDOW_START 0x2000000000000ull
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#define CXL_CAPI_WINDOW_LOG_SIZE 48
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#define CXL_XSL_CONFIG_CURRENT_VERSION CXL_XSL_CONFIG_VERSION1
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bool cxllib_slot_is_supported(struct pci_dev *dev, unsigned long flags)
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{
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int rc;
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u32 phb_index;
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u64 chip_id, capp_unit_id;
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/* No flags currently supported */
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if (flags)
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return false;
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if (!cpu_has_feature(CPU_FTR_HVMODE))
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return false;
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if (!cxl_is_power9())
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return false;
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if (cxl_slot_is_switched(dev))
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return false;
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/* on p9, some pci slots are not connected to a CAPP unit */
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rc = cxl_calc_capp_routing(dev, &chip_id, &phb_index, &capp_unit_id);
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if (rc)
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return false;
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return true;
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}
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EXPORT_SYMBOL_GPL(cxllib_slot_is_supported);
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static DEFINE_MUTEX(dra_mutex);
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static u64 dummy_read_addr = CXL_INVALID_DRA;
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static int allocate_dummy_read_buf(void)
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{
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u64 buf, vaddr;
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size_t buf_size;
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/*
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* Dummy read buffer is 128-byte long, aligned on a
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* 256-byte boundary and we need the physical address.
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*/
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buf_size = CXL_DUMMY_READ_SIZE + (1ull << CXL_DUMMY_READ_ALIGN);
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buf = (u64) kzalloc(buf_size, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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vaddr = (buf + (1ull << CXL_DUMMY_READ_ALIGN) - 1) &
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(~0ull << CXL_DUMMY_READ_ALIGN);
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WARN((vaddr + CXL_DUMMY_READ_SIZE) > (buf + buf_size),
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"Dummy read buffer alignment issue");
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dummy_read_addr = virt_to_phys((void *) vaddr);
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return 0;
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}
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int cxllib_get_xsl_config(struct pci_dev *dev, struct cxllib_xsl_config *cfg)
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{
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int rc;
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u32 phb_index;
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u64 chip_id, capp_unit_id;
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if (!cpu_has_feature(CPU_FTR_HVMODE))
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return -EINVAL;
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mutex_lock(&dra_mutex);
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if (dummy_read_addr == CXL_INVALID_DRA) {
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rc = allocate_dummy_read_buf();
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if (rc) {
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mutex_unlock(&dra_mutex);
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return rc;
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}
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}
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mutex_unlock(&dra_mutex);
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rc = cxl_calc_capp_routing(dev, &chip_id, &phb_index, &capp_unit_id);
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if (rc)
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return rc;
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rc = cxl_get_xsl9_dsnctl(dev, capp_unit_id, &cfg->dsnctl);
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if (rc)
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return rc;
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cfg->version = CXL_XSL_CONFIG_CURRENT_VERSION;
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cfg->log_bar_size = CXL_CAPI_WINDOW_LOG_SIZE;
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cfg->bar_addr = CXL_CAPI_WINDOW_START;
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cfg->dra = dummy_read_addr;
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return 0;
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}
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EXPORT_SYMBOL_GPL(cxllib_get_xsl_config);
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int cxllib_switch_phb_mode(struct pci_dev *dev, enum cxllib_mode mode,
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unsigned long flags)
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{
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int rc = 0;
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if (!cpu_has_feature(CPU_FTR_HVMODE))
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return -EINVAL;
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switch (mode) {
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case CXL_MODE_PCI:
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/*
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* We currently don't support going back to PCI mode
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* However, we'll turn the invalidations off, so that
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* the firmware doesn't have to ack them and can do
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* things like reset, etc.. with no worries.
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* So always return EPERM (can't go back to PCI) or
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* EBUSY if we couldn't even turn off snooping
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*/
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rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_SNOOP_OFF);
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if (rc)
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rc = -EBUSY;
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else
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rc = -EPERM;
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break;
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case CXL_MODE_CXL:
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/* DMA only supported on TVT1 for the time being */
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if (flags != CXL_MODE_DMA_TVT1)
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return -EINVAL;
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rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_DMA_TVT1);
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if (rc)
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return rc;
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rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_SNOOP_ON);
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break;
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default:
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rc = -EINVAL;
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}
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return rc;
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}
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EXPORT_SYMBOL_GPL(cxllib_switch_phb_mode);
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/*
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* When switching the PHB to capi mode, the TVT#1 entry for
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* the Partitionable Endpoint is set in bypass mode, like
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* in PCI mode.
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* Configure the device dma to use TVT#1, which is done
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* by calling dma_set_mask() with a mask large enough.
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*/
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int cxllib_set_device_dma(struct pci_dev *dev, unsigned long flags)
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{
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int rc;
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if (flags)
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return -EINVAL;
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rc = dma_set_mask(&dev->dev, DMA_BIT_MASK(64));
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return rc;
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}
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EXPORT_SYMBOL_GPL(cxllib_set_device_dma);
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int cxllib_get_PE_attributes(struct task_struct *task,
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unsigned long translation_mode,
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struct cxllib_pe_attributes *attr)
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{
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struct mm_struct *mm = NULL;
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if (translation_mode != CXL_TRANSLATED_MODE &&
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translation_mode != CXL_REAL_MODE)
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return -EINVAL;
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attr->sr = cxl_calculate_sr(false,
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task == NULL,
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translation_mode == CXL_REAL_MODE,
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true);
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attr->lpid = mfspr(SPRN_LPID);
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if (task) {
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mm = get_task_mm(task);
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if (mm == NULL)
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return -EINVAL;
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/*
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* Caller is keeping a reference on mm_users for as long
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* as XSL uses the memory context
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*/
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attr->pid = mm->context.id;
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mmput(mm);
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attr->tid = task->thread.tidr;
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} else {
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attr->pid = 0;
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attr->tid = 0;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(cxllib_get_PE_attributes);
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static int get_vma_info(struct mm_struct *mm, u64 addr,
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u64 *vma_start, u64 *vma_end,
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unsigned long *page_size)
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{
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struct vm_area_struct *vma = NULL;
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int rc = 0;
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down_read(&mm->mmap_sem);
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vma = find_vma(mm, addr);
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if (!vma) {
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rc = -EFAULT;
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goto out;
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}
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*page_size = vma_kernel_pagesize(vma);
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*vma_start = vma->vm_start;
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*vma_end = vma->vm_end;
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out:
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up_read(&mm->mmap_sem);
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return rc;
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}
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int cxllib_handle_fault(struct mm_struct *mm, u64 addr, u64 size, u64 flags)
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{
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int rc;
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u64 dar, vma_start, vma_end;
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unsigned long page_size;
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if (mm == NULL)
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return -EFAULT;
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/*
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* The buffer we have to process can extend over several pages
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* and may also cover several VMAs.
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* We iterate over all the pages. The page size could vary
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* between VMAs.
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*/
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rc = get_vma_info(mm, addr, &vma_start, &vma_end, &page_size);
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if (rc)
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return rc;
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for (dar = (addr & ~(page_size - 1)); dar < (addr + size);
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dar += page_size) {
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if (dar < vma_start || dar >= vma_end) {
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/*
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* We don't hold the mm->mmap_sem semaphore
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* while iterating, since the semaphore is
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* required by one of the lower-level page
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* fault processing functions and it could
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* create a deadlock.
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*
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* It means the VMAs can be altered between 2
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* loop iterations and we could theoretically
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* miss a page (however unlikely). But that's
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* not really a problem, as the driver will
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* retry access, get another page fault on the
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* missing page and call us again.
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*/
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rc = get_vma_info(mm, dar, &vma_start, &vma_end,
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&page_size);
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if (rc)
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return rc;
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}
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rc = cxl_handle_mm_fault(mm, flags, dar);
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if (rc)
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return -EFAULT;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(cxllib_handle_fault);
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