Mugunthan V N 6d3d76f877 drivers: net: cpsw: fix cpsw clock gating issue across suspend/resume ... Due to some hardware integration issue, CPSW sliver modules requires a reset across suspend/resume cycle for a successful clock gating to CPGMAC (CPSW and Davinci MDIO) in AM335x PG1.0. This issue is fixed in PG2.x, though to support suspend/resume on PG1.0 this reset is required. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2013-06-19 18:33:58 -07:00
..
cpmac.c
cpsw_ale.c
cpsw_ale.h
cpsw.c	drivers: net: cpsw: fix cpsw clock gating issue across suspend/resume	2013-06-19 18:33:58 -07:00
cpts.c
cpts.h
davinci_cpdma.c	net/ti: add MODULE_DEVICE_TABLE + MODULE_LICENSE	2013-04-25 04:12:29 -04:00
davinci_cpdma.h	net/davinci_cpdma: remove unused argument in cpdma_chan_submit()	2013-04-25 04:11:50 -04:00
davinci_emac.c	net/davinci_cpdma: remove unused argument in cpdma_chan_submit()	2013-04-25 04:11:50 -04:00
davinci_mdio.c	drivers: net: davinci_mdio: restore mdio clk divider in mdio resume	2013-06-13 02:56:54 -07:00
Kconfig
Makefile
tlan.c	tlan: cancel work at remove path	2013-04-16 16:43:34 -04:00
tlan.h