linux_dsm_epyc7002/arch/blackfin/include/asm/barrier.h
Peter Zijlstra b7bb7d9b28 arch,blackfin: Convert smp_mb__*()
Blackfin's atomic primitives do not imply a full barrier as whitnessed
from its SMP smp_mb__{before,after}_clear_bit() implementations.

However since !SMP smp_mb() reduces to barrier() remove everything and
rely on the asm-generic/barrier.h implentation.

Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/n/tip-1widdkdsb3c1titq8jez6g3g@git.kernel.org
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Cc: Steven Miao <realmz6@gmail.com>
Cc: adi-buildroot-devel@lists.sourceforge.net
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-04-18 11:40:34 +02:00

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C

/*
* Copyright 2004-2009 Analog Devices Inc.
* Tony Kou (tonyko@lineo.ca)
*
* Licensed under the GPL-2 or later
*/
#ifndef _BLACKFIN_BARRIER_H
#define _BLACKFIN_BARRIER_H
#include <asm/cache.h>
#define nop() __asm__ __volatile__ ("nop;\n\t" : : )
/*
* Force strict CPU ordering.
*/
#ifdef CONFIG_SMP
#ifdef __ARCH_SYNC_CORE_DCACHE
/* Force Core data cache coherence */
# define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
# define rmb() do { barrier(); smp_check_barrier(); } while (0)
# define wmb() do { barrier(); smp_mark_barrier(); } while (0)
# define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
#endif
#endif /* !CONFIG_SMP */
#define smp_mb__before_atomic() barrier()
#define smp_mb__after_atomic() barrier()
#include <asm-generic/barrier.h>
#endif /* _BLACKFIN_BARRIER_H */