mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 19:13:15 +07:00
cd590b50a9
Add PCIe device nodes in bcm-cygnus.dtsi but keep them disabled there. Only enable them for bcm958300k where PCIe interfaces are populated Signed-off-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
239 lines
6.1 KiB
Plaintext
239 lines
6.1 KiB
Plaintext
/*
|
|
* BSD LICENSE
|
|
*
|
|
* Copyright(c) 2014 Broadcom Corporation. All rights reserved.
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions
|
|
* are met:
|
|
*
|
|
* * Redistributions of source code must retain the above copyright
|
|
* notice, this list of conditions and the following disclaimer.
|
|
* * Redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in
|
|
* the documentation and/or other materials provided with the
|
|
* distribution.
|
|
* * Neither the name of Broadcom Corporation nor the names of its
|
|
* contributors may be used to endorse or promote products derived
|
|
* from this software without specific prior written permission.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
*/
|
|
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
#include <dt-bindings/interrupt-controller/irq.h>
|
|
|
|
#include "skeleton.dtsi"
|
|
|
|
/ {
|
|
compatible = "brcm,cygnus";
|
|
model = "Broadcom Cygnus SoC";
|
|
interrupt-parent = <&gic>;
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a9";
|
|
next-level-cache = <&L2>;
|
|
reg = <0x0>;
|
|
};
|
|
};
|
|
|
|
/include/ "bcm-cygnus-clock.dtsi"
|
|
|
|
pinctrl: pinctrl@0x0301d0c8 {
|
|
compatible = "brcm,cygnus-pinmux";
|
|
reg = <0x0301d0c8 0x30>,
|
|
<0x0301d24c 0x2c>;
|
|
};
|
|
|
|
gpio_crmu: gpio@03024800 {
|
|
compatible = "brcm,cygnus-crmu-gpio";
|
|
reg = <0x03024800 0x50>,
|
|
<0x03024008 0x18>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
};
|
|
|
|
gpio_ccm: gpio@1800a000 {
|
|
compatible = "brcm,cygnus-ccm-gpio";
|
|
reg = <0x1800a000 0x50>,
|
|
<0x0301d164 0x20>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-controller;
|
|
};
|
|
|
|
gpio_asiu: gpio@180a5000 {
|
|
compatible = "brcm,cygnus-asiu-gpio";
|
|
reg = <0x180a5000 0x668>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
|
|
pinmux = <&pinctrl>;
|
|
|
|
interrupt-controller;
|
|
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
amba {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "arm,amba-bus", "simple-bus";
|
|
interrupt-parent = <&gic>;
|
|
ranges;
|
|
|
|
wdt@18009000 {
|
|
compatible = "arm,sp805" , "arm,primecell";
|
|
reg = <0x18009000 0x1000>;
|
|
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&axi81_clk>;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
};
|
|
|
|
i2c0: i2c@18008000 {
|
|
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
|
|
reg = <0x18008000 0x100>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
|
|
clock-frequency = <100000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c1: i2c@1800b000 {
|
|
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
|
|
reg = <0x1800b000 0x100>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
|
|
clock-frequency = <100000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
pcie0: pcie@18012000 {
|
|
compatible = "brcm,iproc-pcie";
|
|
reg = <0x18012000 0x1000>;
|
|
|
|
#interrupt-cells = <1>;
|
|
interrupt-map-mask = <0 0 0 0>;
|
|
interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
|
|
|
|
linux,pci-domain = <0>;
|
|
|
|
bus-range = <0x00 0xff>;
|
|
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
device_type = "pci";
|
|
ranges = <0x81000000 0 0 0x28000000 0 0x00010000
|
|
0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
pcie1: pcie@18013000 {
|
|
compatible = "brcm,iproc-pcie";
|
|
reg = <0x18013000 0x1000>;
|
|
|
|
#interrupt-cells = <1>;
|
|
interrupt-map-mask = <0 0 0 0>;
|
|
interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
|
|
|
|
linux,pci-domain = <1>;
|
|
|
|
bus-range = <0x00 0xff>;
|
|
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
device_type = "pci";
|
|
ranges = <0x81000000 0 0 0x48000000 0 0x00010000
|
|
0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
uart0: serial@18020000 {
|
|
compatible = "snps,dw-apb-uart";
|
|
reg = <0x18020000 0x100>;
|
|
reg-shift = <2>;
|
|
reg-io-width = <4>;
|
|
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&axi81_clk>;
|
|
clock-frequency = <100000000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
uart1: serial@18021000 {
|
|
compatible = "snps,dw-apb-uart";
|
|
reg = <0x18021000 0x100>;
|
|
reg-shift = <2>;
|
|
reg-io-width = <4>;
|
|
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&axi81_clk>;
|
|
clock-frequency = <100000000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
uart2: serial@18022000 {
|
|
compatible = "snps,dw-apb-uart";
|
|
reg = <0x18020000 0x100>;
|
|
reg-shift = <2>;
|
|
reg-io-width = <4>;
|
|
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&axi81_clk>;
|
|
clock-frequency = <100000000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
uart3: serial@18023000 {
|
|
compatible = "snps,dw-apb-uart";
|
|
reg = <0x18023000 0x100>;
|
|
reg-shift = <2>;
|
|
reg-io-width = <4>;
|
|
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&axi81_clk>;
|
|
clock-frequency = <100000000>;
|
|
status = "disabled";
|
|
};
|
|
|
|
gic: interrupt-controller@19021000 {
|
|
compatible = "arm,cortex-a9-gic";
|
|
#interrupt-cells = <3>;
|
|
#address-cells = <0>;
|
|
interrupt-controller;
|
|
reg = <0x19021000 0x1000>,
|
|
<0x19020100 0x100>;
|
|
};
|
|
|
|
L2: l2-cache {
|
|
compatible = "arm,pl310-cache";
|
|
reg = <0x19022000 0x1000>;
|
|
cache-unified;
|
|
cache-level = <2>;
|
|
};
|
|
|
|
timer@19020200 {
|
|
compatible = "arm,cortex-a9-global-timer";
|
|
reg = <0x19020200 0x100>;
|
|
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&periph_clk>;
|
|
};
|
|
|
|
};
|