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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7730b4c7e3
This commit enhances the iwarp driver to optionally keep a log of rdma work request timining data for kernel mode QPs. If iw_cxgb4 module option c4iw_wr_log is set to non-zero, each work request is tracked and timing data maintained in a rolling log that is 4096 entries deep by default. Module option c4iw_wr_log_size_order allows specifing a log2 size to use instead of the default order of 12 (4096 entries). Both module options are read-only and must be passed in at module load time to set them. IE: modprobe iw_cxgb4 c4iw_wr_log=1 c4iw_wr_log_size_order=10 The timing data is viewable via the iw_cxgb4 debugfs file "wr_log". Writing anything to this file will clear all the timing data. Data tracked includes: - The host time when the work request was posted, just before ringing the doorbell. The host time when the completion was polled by the application. This is also the time the log entry is created. The delta of these two times is the amount of time took processing the work request. - The qid of the EQ used to post the work request. - The work request opcode. - The cqe wr_id field. For sq completions requests this is the swsqe index. For recv completions this is the MSN of the ingress SEND. This value can be used to match log entries from this log with firmware flowc event entries. - The sge timestamp value just before ringing the doorbell when posting, the sge timestamp value just after polling the completion, and CQE.timestamp field from the completion itself. With these three timestamps we can track the latency from post to poll, and the amount of time the completion resided in the CQ before being reaped by the application. With debug firmware, the sge timestamp is also logged by firmware in its flowc history so that we can compute the latency from posting the work request until the firmware sees it. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
304 lines
10 KiB
C
304 lines
10 KiB
C
/*
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* This file is part of the Chelsio T4 Ethernet driver for Linux.
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*
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* Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef __CXGB4_OFLD_H
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#define __CXGB4_OFLD_H
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#include <linux/cache.h>
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#include <linux/spinlock.h>
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#include <linux/skbuff.h>
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#include <linux/inetdevice.h>
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#include <linux/atomic.h>
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/* CPL message priority levels */
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enum {
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CPL_PRIORITY_DATA = 0, /* data messages */
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CPL_PRIORITY_SETUP = 1, /* connection setup messages */
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CPL_PRIORITY_TEARDOWN = 0, /* connection teardown messages */
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CPL_PRIORITY_LISTEN = 1, /* listen start/stop messages */
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CPL_PRIORITY_ACK = 1, /* RX ACK messages */
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CPL_PRIORITY_CONTROL = 1 /* control messages */
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};
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#define INIT_TP_WR(w, tid) do { \
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(w)->wr.wr_hi = htonl(FW_WR_OP(FW_TP_WR) | \
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FW_WR_IMMDLEN(sizeof(*w) - sizeof(w->wr))); \
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(w)->wr.wr_mid = htonl(FW_WR_LEN16(DIV_ROUND_UP(sizeof(*w), 16)) | \
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FW_WR_FLOWID(tid)); \
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(w)->wr.wr_lo = cpu_to_be64(0); \
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} while (0)
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#define INIT_TP_WR_CPL(w, cpl, tid) do { \
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INIT_TP_WR(w, tid); \
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OPCODE_TID(w) = htonl(MK_OPCODE_TID(cpl, tid)); \
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} while (0)
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#define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \
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(w)->wr.wr_hi = htonl(FW_WR_OP(FW_ULPTX_WR) | FW_WR_ATOMIC(atomic)); \
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(w)->wr.wr_mid = htonl(FW_WR_LEN16(DIV_ROUND_UP(wrlen, 16)) | \
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FW_WR_FLOWID(tid)); \
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(w)->wr.wr_lo = cpu_to_be64(0); \
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} while (0)
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/* Special asynchronous notification message */
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#define CXGB4_MSG_AN ((void *)1)
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struct serv_entry {
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void *data;
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};
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union aopen_entry {
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void *data;
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union aopen_entry *next;
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};
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/*
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* Holds the size, base address, free list start, etc of the TID, server TID,
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* and active-open TID tables. The tables themselves are allocated dynamically.
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*/
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struct tid_info {
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void **tid_tab;
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unsigned int ntids;
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struct serv_entry *stid_tab;
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unsigned long *stid_bmap;
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unsigned int nstids;
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unsigned int stid_base;
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union aopen_entry *atid_tab;
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unsigned int natids;
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unsigned int atid_base;
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struct filter_entry *ftid_tab;
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unsigned int nftids;
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unsigned int ftid_base;
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unsigned int aftid_base;
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unsigned int aftid_end;
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/* Server filter region */
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unsigned int sftid_base;
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unsigned int nsftids;
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spinlock_t atid_lock ____cacheline_aligned_in_smp;
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union aopen_entry *afree;
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unsigned int atids_in_use;
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spinlock_t stid_lock;
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unsigned int stids_in_use;
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atomic_t tids_in_use;
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};
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static inline void *lookup_tid(const struct tid_info *t, unsigned int tid)
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{
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return tid < t->ntids ? t->tid_tab[tid] : NULL;
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}
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static inline void *lookup_atid(const struct tid_info *t, unsigned int atid)
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{
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return atid < t->natids ? t->atid_tab[atid].data : NULL;
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}
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static inline void *lookup_stid(const struct tid_info *t, unsigned int stid)
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{
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/* Is it a server filter TID? */
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if (t->nsftids && (stid >= t->sftid_base)) {
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stid -= t->sftid_base;
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stid += t->nstids;
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} else {
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stid -= t->stid_base;
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}
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return stid < (t->nstids + t->nsftids) ? t->stid_tab[stid].data : NULL;
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}
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static inline void cxgb4_insert_tid(struct tid_info *t, void *data,
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unsigned int tid)
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{
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t->tid_tab[tid] = data;
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atomic_inc(&t->tids_in_use);
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}
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int cxgb4_alloc_atid(struct tid_info *t, void *data);
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int cxgb4_alloc_stid(struct tid_info *t, int family, void *data);
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int cxgb4_alloc_sftid(struct tid_info *t, int family, void *data);
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void cxgb4_free_atid(struct tid_info *t, unsigned int atid);
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void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family);
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void cxgb4_remove_tid(struct tid_info *t, unsigned int qid, unsigned int tid);
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struct in6_addr;
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int cxgb4_create_server(const struct net_device *dev, unsigned int stid,
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__be32 sip, __be16 sport, __be16 vlan,
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unsigned int queue);
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int cxgb4_create_server6(const struct net_device *dev, unsigned int stid,
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const struct in6_addr *sip, __be16 sport,
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unsigned int queue);
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int cxgb4_remove_server(const struct net_device *dev, unsigned int stid,
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unsigned int queue, bool ipv6);
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int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid,
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__be32 sip, __be16 sport, __be16 vlan,
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unsigned int queue,
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unsigned char port, unsigned char mask);
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int cxgb4_remove_server_filter(const struct net_device *dev, unsigned int stid,
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unsigned int queue, bool ipv6);
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static inline void set_wr_txq(struct sk_buff *skb, int prio, int queue)
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{
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skb_set_queue_mapping(skb, (queue << 1) | prio);
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}
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enum cxgb4_uld {
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CXGB4_ULD_RDMA,
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CXGB4_ULD_ISCSI,
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CXGB4_ULD_MAX
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};
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enum cxgb4_state {
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CXGB4_STATE_UP,
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CXGB4_STATE_START_RECOVERY,
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CXGB4_STATE_DOWN,
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CXGB4_STATE_DETACH
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};
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enum cxgb4_control {
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CXGB4_CONTROL_DB_FULL,
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CXGB4_CONTROL_DB_EMPTY,
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CXGB4_CONTROL_DB_DROP,
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};
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struct pci_dev;
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struct l2t_data;
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struct net_device;
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struct pkt_gl;
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struct tp_tcp_stats;
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struct cxgb4_range {
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unsigned int start;
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unsigned int size;
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};
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struct cxgb4_virt_res { /* virtualized HW resources */
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struct cxgb4_range ddp;
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struct cxgb4_range iscsi;
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struct cxgb4_range stag;
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struct cxgb4_range rq;
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struct cxgb4_range pbl;
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struct cxgb4_range qp;
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struct cxgb4_range cq;
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struct cxgb4_range ocq;
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};
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#define OCQ_WIN_OFFSET(pdev, vres) \
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(pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size))
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/*
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* Block of information the LLD provides to ULDs attaching to a device.
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*/
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struct cxgb4_lld_info {
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struct pci_dev *pdev; /* associated PCI device */
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struct l2t_data *l2t; /* L2 table */
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struct tid_info *tids; /* TID table */
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struct net_device **ports; /* device ports */
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const struct cxgb4_virt_res *vr; /* assorted HW resources */
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const unsigned short *mtus; /* MTU table */
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const unsigned short *rxq_ids; /* the ULD's Rx queue ids */
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const unsigned short *ciq_ids; /* the ULD's concentrator IQ ids */
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unsigned short nrxq; /* # of Rx queues */
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unsigned short ntxq; /* # of Tx queues */
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unsigned short nciq; /* # of concentrator IQ */
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unsigned char nchan:4; /* # of channels */
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unsigned char nports:4; /* # of ports */
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unsigned char wr_cred; /* WR 16-byte credits */
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unsigned char adapter_type; /* type of adapter */
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unsigned char fw_api_ver; /* FW API version */
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unsigned int fw_vers; /* FW version */
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unsigned int iscsi_iolen; /* iSCSI max I/O length */
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unsigned int cclk_ps; /* Core clock period in psec */
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unsigned short udb_density; /* # of user DB/page */
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unsigned short ucq_density; /* # of user CQs/page */
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unsigned short filt_mode; /* filter optional components */
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unsigned short tx_modq[NCHAN]; /* maps each tx channel to a */
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/* scheduler queue */
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void __iomem *gts_reg; /* address of GTS register */
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void __iomem *db_reg; /* address of kernel doorbell */
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int dbfifo_int_thresh; /* doorbell fifo int threshold */
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unsigned int sge_ingpadboundary; /* SGE ingress padding boundary */
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unsigned int sge_egrstatuspagesize; /* SGE egress status page size */
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unsigned int sge_pktshift; /* Padding between CPL and */
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/* packet data */
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unsigned int pf; /* Physical Function we're using */
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bool enable_fw_ofld_conn; /* Enable connection through fw */
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/* WR */
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unsigned int max_ordird_qp; /* Max ORD/IRD depth per RDMA QP */
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unsigned int max_ird_adapter; /* Max IRD memory per adapter */
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bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */
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};
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struct cxgb4_uld_info {
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const char *name;
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void *(*add)(const struct cxgb4_lld_info *p);
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int (*rx_handler)(void *handle, const __be64 *rsp,
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const struct pkt_gl *gl);
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int (*state_change)(void *handle, enum cxgb4_state new_state);
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int (*control)(void *handle, enum cxgb4_control control, ...);
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};
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int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);
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int cxgb4_unregister_uld(enum cxgb4_uld type);
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int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb);
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unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo);
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unsigned int cxgb4_port_chan(const struct net_device *dev);
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unsigned int cxgb4_port_viid(const struct net_device *dev);
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unsigned int cxgb4_port_idx(const struct net_device *dev);
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unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu,
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unsigned int *idx);
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unsigned int cxgb4_best_aligned_mtu(const unsigned short *mtus,
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unsigned short header_size,
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unsigned short data_size_max,
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unsigned short data_size_align,
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unsigned int *mtu_idxp);
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void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4,
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struct tp_tcp_stats *v6);
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void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,
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const unsigned int *pgsz_order);
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struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl,
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unsigned int skb_len, unsigned int pull_len);
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int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, u16 size);
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int cxgb4_flush_eq_cache(struct net_device *dev);
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void cxgb4_disable_db_coalescing(struct net_device *dev);
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void cxgb4_enable_db_coalescing(struct net_device *dev);
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int cxgb4_read_tpte(struct net_device *dev, u32 stag, __be32 *tpte);
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u64 cxgb4_read_sge_timestamp(struct net_device *dev);
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#endif /* !__CXGB4_OFLD_H */
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