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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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21e4b0726d
This driver was entered into staging a few cycles ago because there was not time to integrate the Realtek version into the support routines in the kernel. Now that there is an effort to converg the code base from Linux and the Realtek repo, it is time to move this driver. In addition, all the updates included in the 06/28/2014 version of the Realtek drivers are included here. With this change, it will be necessary to delete the staging driver. That will be handled in a separate patch. As it impacts the staging tree, such a patch is sent to a different destination. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
61 lines
2.2 KiB
C
61 lines
2.2 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2009-2010 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Created on 2010/ 5/18, 1:41
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __RTL8821AE_TABLE__H_
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#define __RTL8821AE_TABLE__H_
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#include <linux/types.h>
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#define RTL8821AEPHY_REG_1TARRAYLEN 344
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extern u32 RTL8821AE_PHY_REG_ARRAY[];
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#define RTL8812AEPHY_REG_1TARRAYLEN 490
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extern u32 RTL8812AE_PHY_REG_ARRAY[];
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#define RTL8821AEPHY_REG_ARRAY_PGLEN 90
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extern u32 RTL8821AE_PHY_REG_ARRAY_PG[];
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#define RTL8812AEPHY_REG_ARRAY_PGLEN 276
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extern u32 RTL8812AE_PHY_REG_ARRAY_PG[];
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/* #define RTL8723BE_RADIOA_1TARRAYLEN 206 */
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/* extern u8 *RTL8821AE_TXPWR_LMT_ARRAY[]; */
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#define RTL8812AE_RADIOA_1TARRAYLEN 1264
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extern u32 RTL8812AE_RADIOA_ARRAY[];
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#define RTL8812AE_RADIOB_1TARRAYLEN 1240
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extern u32 RTL8812AE_RADIOB_ARRAY[];
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#define RTL8821AE_RADIOA_1TARRAYLEN 1176
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extern u32 RTL8821AE_RADIOA_ARRAY[];
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#define RTL8821AEMAC_1T_ARRAYLEN 194
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extern u32 RTL8821AE_MAC_REG_ARRAY[];
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#define RTL8812AEMAC_1T_ARRAYLEN 214
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extern u32 RTL8812AE_MAC_REG_ARRAY[];
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#define RTL8821AEAGCTAB_1TARRAYLEN 382
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extern u32 RTL8821AE_AGC_TAB_ARRAY[];
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#define RTL8812AEAGCTAB_1TARRAYLEN 1312
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extern u32 RTL8812AE_AGC_TAB_ARRAY[];
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#define RTL8812AE_TXPWR_LMT_ARRAY_LEN 3948
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extern u8 *RTL8812AE_TXPWR_LMT[];
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#define RTL8821AE_TXPWR_LMT_ARRAY_LEN 3948
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extern u8 *RTL8821AE_TXPWR_LMT[];
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#endif
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