linux_dsm_epyc7002/drivers/clk/mediatek
Sascha Hauer 7b2a4635b8 clk: mediatek: mt8173: Fix enabling of critical clocks
On the MT8173 the clocks are provided by different units. To enable
the critical clocks we must be sure that all parent clocks are already
registered, otherwise the parents of the critical clocks end up being
unused and get disabled later. To find a place where all parents are
registered we try each time after we've registered some clocks if
all known providers are present now and only then we enable the critical
clocks

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
[sboyd@codeaurora.org: Marked function and data __init]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:54:13 -07:00
..
clk-gate.c clk: mediatek: Initialize clk_init_data 2015-05-19 18:40:48 -07:00
clk-gate.h
clk-mt8135.c clk: mediatek: Fix apmixedsys clock registration 2015-06-04 14:07:07 -07:00
clk-mt8173.c clk: mediatek: mt8173: Fix enabling of critical clocks 2015-07-06 15:54:13 -07:00
clk-mtk.c
clk-mtk.h clk: mediatek: Add reset controller support 2015-05-05 22:50:33 -07:00
clk-pll.c clk: mediatek: Initialize clk_init_data 2015-05-19 18:40:48 -07:00
Makefile clk: mediatek: Add basic clocks for Mediatek MT8173. 2015-05-05 22:50:38 -07:00
reset.c clk: mediatek: Add reset controller support 2015-05-05 22:50:33 -07:00