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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
114 lines
2.4 KiB
C
114 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* ops-vr41xx.c, PCI configuration routines for the PCIU of NEC VR4100 series.
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*
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* Copyright (C) 2001-2003 MontaVista Software Inc.
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* Author: Yoichi Yuasa <source@mvista.com>
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* Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@linux-mips.org>
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*/
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/*
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* Changes:
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* MontaVista Software Inc. <source@mvista.com>
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* - New creation, NEC VR4122 and VR4131 are supported.
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*/
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#include <linux/pci.h>
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#include <linux/types.h>
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#include <asm/io.h>
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#define PCICONFDREG (void __iomem *)KSEG1ADDR(0x0f000c14)
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#define PCICONFAREG (void __iomem *)KSEG1ADDR(0x0f000c18)
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static inline int set_pci_configuration_address(unsigned char number,
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unsigned int devfn, int where)
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{
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if (number == 0) {
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/*
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* Type 0 configuration
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*/
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if (PCI_SLOT(devfn) < 11 || where > 0xff)
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return -EINVAL;
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writel((1U << PCI_SLOT(devfn)) | (PCI_FUNC(devfn) << 8) |
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(where & 0xfc), PCICONFAREG);
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} else {
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/*
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* Type 1 configuration
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*/
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if (where > 0xff)
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return -EINVAL;
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writel(((uint32_t)number << 16) | ((devfn & 0xff) << 8) |
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(where & 0xfc) | 1U, PCICONFAREG);
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}
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return 0;
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}
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static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
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int size, uint32_t *val)
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{
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uint32_t data;
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*val = 0xffffffffU;
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if (set_pci_configuration_address(bus->number, devfn, where) < 0)
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return PCIBIOS_DEVICE_NOT_FOUND;
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data = readl(PCICONFDREG);
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switch (size) {
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case 1:
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*val = (data >> ((where & 3) << 3)) & 0xffU;
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break;
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case 2:
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*val = (data >> ((where & 2) << 3)) & 0xffffU;
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break;
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case 4:
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*val = data;
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break;
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default:
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return PCIBIOS_FUNC_NOT_SUPPORTED;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
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int size, uint32_t val)
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{
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uint32_t data;
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int shift;
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if (set_pci_configuration_address(bus->number, devfn, where) < 0)
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return PCIBIOS_DEVICE_NOT_FOUND;
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data = readl(PCICONFDREG);
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switch (size) {
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case 1:
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shift = (where & 3) << 3;
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data &= ~(0xffU << shift);
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data |= ((val & 0xffU) << shift);
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break;
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case 2:
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shift = (where & 2) << 3;
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data &= ~(0xffffU << shift);
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data |= ((val & 0xffffU) << shift);
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break;
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case 4:
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data = val;
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break;
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default:
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return PCIBIOS_FUNC_NOT_SUPPORTED;
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}
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writel(data, PCICONFDREG);
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return PCIBIOS_SUCCESSFUL;
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}
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struct pci_ops vr41xx_pci_ops = {
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.read = pci_config_read,
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.write = pci_config_write,
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};
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