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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
193 lines
4.2 KiB
Plaintext
193 lines
4.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* MPC7448HPC2 (Taiga) board Device Tree Source
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*
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* Copyright 2006, 2008 Freescale Semiconductor Inc.
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* 2006 Roy Zang <Roy Zang at freescale.com>.
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*/
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/dts-v1/;
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/ {
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model = "mpc7448hpc2";
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compatible = "mpc74xx";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = &enet0;
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ethernet1 = &enet1;
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serial0 = &serial0;
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serial1 = &serial1;
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pci0 = &pci0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells =<0>;
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PowerPC,7448@0 {
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device_type = "cpu";
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reg = <0x0>;
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d-cache-line-size = <32>; // 32 bytes
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i-cache-line-size = <32>; // 32 bytes
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d-cache-size = <0x8000>; // L1, 32K bytes
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i-cache-size = <0x8000>; // L1, 32K bytes
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timebase-frequency = <0>; // 33 MHz, from uboot
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clock-frequency = <0>; // From U-Boot
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bus-frequency = <0>; // From U-Boot
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};
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x20000000 // DDR2 512M at 0
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>;
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};
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tsi108@c0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "tsi-bridge";
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ranges = <0x0 0xc0000000 0x10000>;
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reg = <0xc0000000 0x10000>;
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bus-frequency = <0>;
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i2c@7000 {
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interrupt-parent = <&mpic>;
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interrupts = <14 0>;
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reg = <0x7000 0x400>;
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device_type = "i2c";
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compatible = "tsi108-i2c";
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};
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MDIO: mdio@6000 {
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compatible = "tsi108-mdio";
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reg = <0x6000 0x50>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy8: ethernet-phy@8 {
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interrupt-parent = <&mpic>;
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interrupts = <2 1>;
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reg = <0x8>;
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};
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phy9: ethernet-phy@9 {
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interrupt-parent = <&mpic>;
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interrupts = <2 1>;
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reg = <0x9>;
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};
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};
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enet0: ethernet@6200 {
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linux,network-index = <0>;
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#size-cells = <0>;
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device_type = "network";
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compatible = "tsi108-ethernet";
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reg = <0x6000 0x200>;
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address = [ 00 06 D2 00 00 01 ];
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interrupts = <16 2>;
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interrupt-parent = <&mpic>;
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mdio-handle = <&MDIO>;
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phy-handle = <&phy8>;
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};
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enet1: ethernet@6600 {
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linux,network-index = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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compatible = "tsi108-ethernet";
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reg = <0x6400 0x200>;
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address = [ 00 06 D2 00 00 02 ];
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interrupts = <17 2>;
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interrupt-parent = <&mpic>;
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mdio-handle = <&MDIO>;
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phy-handle = <&phy9>;
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};
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serial0: serial@7808 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0x7808 0x200>;
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clock-frequency = <1064000000>;
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interrupts = <12 0>;
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interrupt-parent = <&mpic>;
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};
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serial1: serial@7c08 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0x7c08 0x200>;
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clock-frequency = <1064000000>;
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interrupts = <13 0>;
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interrupt-parent = <&mpic>;
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};
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mpic: pic@7400 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <0x7400 0x400>;
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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};
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pci0: pci@1000 {
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compatible = "tsi108-pci";
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0x1000 0x1000>;
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bus-range = <0 0>;
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ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000
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0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>;
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clock-frequency = <133333332>;
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interrupt-parent = <&mpic>;
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interrupts = <23 2>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x11 */
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0x800 0x0 0x0 0x1 &RT0 0x24 0x0
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0x800 0x0 0x0 0x2 &RT0 0x25 0x0
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0x800 0x0 0x0 0x3 &RT0 0x26 0x0
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0x800 0x0 0x0 0x4 &RT0 0x27 0x0
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/* IDSEL 0x12 */
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0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
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0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
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0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
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0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
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/* IDSEL 0x13 */
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0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
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0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
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0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
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0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
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/* IDSEL 0x14 */
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0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
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0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
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0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
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0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
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>;
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RT0: router@1180 {
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clock-frequency = <0>;
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interrupt-controller;
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device_type = "pic-router";
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#address-cells = <0>;
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#interrupt-cells = <2>;
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big-endian;
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interrupts = <23 2>;
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interrupt-parent = <&mpic>;
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};
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};
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};
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};
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