mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 23:02:27 +07:00
da7920e31d
- New board support: i.MX51 ZII RDU1, i.MX53 GE Healthcare PPD, i.MX6
TX modules for MB7 from Ka-Ro Electronics, i.MX6 Wandboard revd1
variants, i.MX6 LWN DISPLAY5 board, Pistachio i.MX6Q board, i.MX6SX
Vining-2000 board.
- Use the 'vpcie-supply' property for PCIe device for boards
imx6qdl-sabresd, imx6q-novena and imx6q-cm-fx6.
- A series from Jagan Teki to update imx6qdl-icore board with audio,
touch and CAN support.
- Switch to nvmem for accessing OCOTP from tempmon for i.MX6SX and add
tempmon support for i.MX6UL.
- A bunch of patches from Lothar Waßmann updating Ka-Ro i.MX28, i.MX53
and i.MX6 TX modules.
- Fix DTC warnings in i.MX device trees, dropping leading zeros from
unit address, correcting display nodes notation and display port
names, fixing nodes with unit name and no reg property.
- Other random device updates for various board support.
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Merge tag 'imx-dt-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "i.MX device tree updates for 4.15" from Shawn Guo:
- New board support: i.MX51 ZII RDU1, i.MX53 GE Healthcare PPD, i.MX6
TX modules for MB7 from Ka-Ro Electronics, i.MX6 Wandboard revd1
variants, i.MX6 LWN DISPLAY5 board, Pistachio i.MX6Q board, i.MX6SX
Vining-2000 board.
- Use the 'vpcie-supply' property for PCIe device for boards
imx6qdl-sabresd, imx6q-novena and imx6q-cm-fx6.
- A series from Jagan Teki to update imx6qdl-icore board with audio,
touch and CAN support.
- Switch to nvmem for accessing OCOTP from tempmon for i.MX6SX and add
tempmon support for i.MX6UL.
- A bunch of patches from Lothar Waßmann updating Ka-Ro i.MX28, i.MX53
and i.MX6 TX modules.
- Fix DTC warnings in i.MX device trees, dropping leading zeros from
unit address, correcting display nodes notation and display port
names, fixing nodes with unit name and no reg property.
- Other random device updates for various board support.
* tag 'imx-dt-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (63 commits)
ARM: dts: imx53-tx53: fix interrupt flags
ARM: dts: imx28-tx28: fix interrupt flags
ARM: dts: display5: Device tree description of LWN's DISPLAY5 board
ARM: dts: imx53-qsb-common: Fix 'led_gpio7_7@0' node with unit name and no reg property
ARM: dts: imx53-m53evk: Fix 'led_gpio@0' node with unit name and no reg property
ARM: dts: imx53: Fix 'usbphy@x' node with unit name and no reg property
ARM: dts: imx51-ts4800: Fix 'port@0' node with unit name and no reg property
ARM: dts: imx51-apf51dev: Fix 'backlight@bl1' node with unit name and no reg property
ARM: dts: imx: add ZII RDU1 board
ARM: dts: imx: add support for TX6 modules on MB7 baseboard
ARM: dts: imx: add support for TX6QP
ARM: dts: imx6-tx6: add a .dtsi file for the MB7 baseboard
ARM: dts: imx6-tx6: move display configuration to .dtsi file
ARM: dts: imx6-tx6: add support for I2C bus recovery
ARM: dts: imx6-tx6: convert to using simple-audio-card
ARM: dts: imx6-tx6: specify ethernet phy reset post-delay
ARM: dts: imx6-tx6: improve ethernet related pinctrl setup
ARM: dts: imx6-tx6: add trickle-charge config for DS1339
ARM: dts: imx6-tx6: remove obsolete ipu1 alias
ARM: dts: imx6-tx6: remove obsolete eeti,egalax_ts
...
[arnd: made sure we have no new leading zeroes in unit address during merge]
835 lines
18 KiB
Plaintext
835 lines
18 KiB
Plaintext
/*
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* Copyright (C) 2017 Zodiac Inflight Innovations
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "imx51.dtsi"
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#include <dt-bindings/sound/fsl-imx-audmux.h>
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/ {
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model = "ZII RDU1 Board";
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compatible = "zii,imx51-rdu1", "fsl,imx51";
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chosen {
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stdout-path = &uart1;
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};
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aliases {
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mdio-gpio0 = &mdio_gpio;
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rtc0 = &ds1341;
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};
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clk_26M_osc: 26M_osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <26000000>;
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};
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clk_26M_osc_gate: 26M_gate {
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compatible = "gpio-gate-clock";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_clk26mhz>;
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clocks = <&clk_26M_osc>;
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#clock-cells = <0>;
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enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
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};
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clk_26M_usb: usbhost_gate {
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compatible = "gpio-gate-clock";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbgate26mhz>;
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clocks = <&clk_26M_osc_gate>;
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#clock-cells = <0>;
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enable-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
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};
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clk_26M_snd: snd_gate {
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compatible = "gpio-gate-clock";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sndgate26mhz>;
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clocks = <&clk_26M_osc_gate>;
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#clock-cells = <0>;
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enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
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};
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reg_5p0v_main: regulator-5p0v-main {
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compatible = "regulator-fixed";
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regulator-name = "5V_MAIN";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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disp0 {
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compatible = "fsl,imx-parallel-display";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu_disp1>;
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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display_in: endpoint {
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remote-endpoint = <&ipu_di0_disp1>;
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};
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};
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port@1 {
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reg = <1>;
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display_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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panel {
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/* no compatible here, bootloader will patch in correct one */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_panel>;
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power-supply = <®_3p3v>;
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enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
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status = "disabled";
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port {
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panel_in: endpoint {
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remote-endpoint = <&display_out>;
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};
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};
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};
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i2c_gpio: i2c-gpio {
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compatible = "i2c-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_swi2c>;
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gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>, /* sda */
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<&gpio3 4 GPIO_ACTIVE_HIGH>; /* scl */
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i2c-gpio,delay-us = <50>;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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sgtl5000: codec@a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&clk_26M_snd>;
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VDDA-supply = <&vdig_reg>;
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VDDIO-supply = <&vvideo_reg>;
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#sound-dai-cells = <0>;
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};
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};
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spi_gpio: spi-gpio {
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpiospi0>;
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status = "okay";
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gpio-sck = <&gpio4 15 GPIO_ACTIVE_HIGH>;
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gpio-mosi = <&gpio4 12 GPIO_ACTIVE_HIGH>;
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gpio-miso = <&gpio4 11 GPIO_ACTIVE_HIGH>;
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num-chipselects = <1>;
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cs-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
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eeprom@0 {
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compatible = "eeprom-93xx46";
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reg = <0>;
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spi-max-frequency = <1000000>;
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spi-cs-high;
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data-size = <8>;
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};
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};
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mdio_gpio: mdio-gpio {
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compatible = "virtual,mdio-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_swmdio>;
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gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>, /* mdc */
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<&gpio3 25 GPIO_ACTIVE_HIGH>; /* mdio */
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#address-cells = <1>;
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#size-cells = <0>;
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switch@0 {
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compatible = "marvell,mv88e6085";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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dsa,member = <0 0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "cpu";
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ethernet = <&fec>;
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fixed-link {
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speed = <100>;
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full-duplex;
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};
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};
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port@1 {
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reg = <1>;
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label = "netaux";
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};
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port@3 {
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reg = <3>;
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label = "netright";
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};
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port@4 {
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reg = <4>;
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label = "netleft";
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};
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};
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};
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "RDU1 audio";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&sound_codec>;
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simple-audio-card,frame-master = <&sound_codec>;
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Headphone Jack", "HPLEFT",
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"Headphone Jack", "HPRIGHT";
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simple-audio-card,aux-devs = <&tpa6130a2>;
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sound_cpu: simple-audio-card,cpu {
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sound-dai = <&ssi2>;
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};
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sound_codec: simple-audio-card,codec {
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sound-dai = <&sgtl5000>;
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clocks = <&clk_26M_snd>;
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};
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};
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usbh1phy: usbphy1 {
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compatible = "usb-nop-xceiv";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh1phy>;
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clocks = <&clk_26M_usb>;
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clock-names = "main_clk";
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reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
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vcc-supply = <&vusb_reg>;
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};
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usbh2phy: usbphy2 {
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compatible = "usb-nop-xceiv";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh2phy>;
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clocks = <&clk_26M_usb>;
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clock-names = "main_clk";
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reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
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vcc-supply = <&vusb_reg>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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ssi2 {
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fsl,audmux-port = <1>;
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fsl,port-config = <
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(IMX_AUDMUX_V2_PTCR_SYN |
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IMX_AUDMUX_V2_PTCR_TFSEL(2) |
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IMX_AUDMUX_V2_PTCR_TCSEL(2) |
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IMX_AUDMUX_V2_PTCR_TFSDIR |
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IMX_AUDMUX_V2_PTCR_TCLKDIR)
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IMX_AUDMUX_V2_PDCR_RXDSEL(2)
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>;
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};
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aud3 {
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fsl,audmux-port = <2>;
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fsl,port-config = <
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IMX_AUDMUX_V2_PTCR_SYN
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IMX_AUDMUX_V2_PDCR_RXDSEL(1)
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>;
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};
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};
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&cpu {
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cpu-supply = <&sw1_reg>;
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
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<&gpio4 25 GPIO_ACTIVE_LOW>;
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status = "okay";
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pmic@0 {
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compatible = "fsl,mc13892";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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spi-max-frequency = <6000000>;
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spi-cs-high;
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reg = <0>;
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interrupt-parent = <&gpio1>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
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fsl,mc13xxx-uses-adc;
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regulators {
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sw1_reg: sw1 {
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1375000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3_reg: sw3 {
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw4_reg: sw4 {
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vpll_reg: vpll {
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdig_reg: vdig {
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regulator-min-microvolt = <1650000>;
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regulator-max-microvolt = <1650000>;
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regulator-boot-on;
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};
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vsd_reg: vsd {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3150000>;
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};
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vusb_reg: vusb {
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regulator-always-on;
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};
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vusb2_reg: vusb2 {
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regulator-min-microvolt = <2400000>;
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|
regulator-max-microvolt = <2775000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vvideo_reg: vvideo {
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regulator-min-microvolt = <2775000>;
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regulator-max-microvolt = <2775000>;
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};
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vaudio_reg: vaudio {
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regulator-min-microvolt = <2300000>;
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regulator-max-microvolt = <3000000>;
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};
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|
vcam_reg: vcam {
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regulator-min-microvolt = <2500000>;
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|
regulator-max-microvolt = <3000000>;
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};
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|
vgen1_reg: vgen1 {
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regulator-min-microvolt = <1200000>;
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|
regulator-max-microvolt = <1200000>;
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};
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vgen2_reg: vgen2 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3150000>;
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regulator-always-on;
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};
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|
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vgen3_reg: vgen3 {
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regulator-min-microvolt = <1800000>;
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|
regulator-max-microvolt = <2900000>;
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regulator-always-on;
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};
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};
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leds {
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#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
led-control = <0x0 0x0 0x3f83f8 0x0>;
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|
|
|
sysled0 {
|
|
reg = <3>;
|
|
label = "system:green:status";
|
|
linux,default-trigger = "default-on";
|
|
};
|
|
|
|
sysled1 {
|
|
reg = <4>;
|
|
label = "system:green:act";
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
};
|
|
};
|
|
|
|
flash@1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "atmel,at45db642d", "atmel,at45", "atmel,dataflash";
|
|
spi-max-frequency = <25000000>;
|
|
reg = <1>;
|
|
};
|
|
};
|
|
|
|
&esdhc1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_esdhc1>;
|
|
bus-width = <4>;
|
|
non-removable;
|
|
status = "okay";
|
|
};
|
|
|
|
&fec {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_fec>;
|
|
phy-mode = "mii";
|
|
phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
|
|
phy-supply = <&vgen3_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c2>;
|
|
status = "okay";
|
|
|
|
eeprom@50 {
|
|
compatible = "atmel,24c04";
|
|
pagesize = <16>;
|
|
reg = <0x50>;
|
|
};
|
|
|
|
tpa6130a2: amp@60 {
|
|
compatible = "ti,tpa6130a2";
|
|
reg = <0x60>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ampgpio>;
|
|
power-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
|
|
Vdd-supply = <®_3p3v>;
|
|
};
|
|
|
|
ds1341: rtc@68 {
|
|
compatible = "maxim,ds1341";
|
|
reg = <0x68>;
|
|
};
|
|
|
|
/* touch nodes default disabled, bootloader will enable the right one */
|
|
|
|
touchscreen@4b {
|
|
compatible = "atmel,maxtouch";
|
|
reg = <0x4b>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ts>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
|
|
status = "disabled";
|
|
};
|
|
|
|
touchscreen@4c {
|
|
compatible = "atmel,maxtouch";
|
|
reg = <0x4c>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ts>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
|
|
status = "disabled";
|
|
};
|
|
|
|
touchscreen@20 {
|
|
compatible = "syna,rmi4_i2c";
|
|
reg = <0x20>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ts>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
|
|
status = "disabled";
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
rmi4-f01@1 {
|
|
reg = <0x1>;
|
|
syna,nosleep-mode = <2>;
|
|
};
|
|
|
|
rmi4-f11@11 {
|
|
reg = <0x11>;
|
|
touch-inverted-y;
|
|
touch-swapped-x-y;
|
|
syna,sensor-type = <1>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
&ipu_di0_disp1 {
|
|
remote-endpoint = <&display_in>;
|
|
};
|
|
|
|
&ssi2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbh1>;
|
|
dr_mode = "host";
|
|
phy_type = "ulpi";
|
|
fsl,usbphy = <&usbh1phy>;
|
|
disable-over-current;
|
|
vbus-supply = <®_5p0v_main>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbh2>;
|
|
dr_mode = "host";
|
|
phy_type = "ulpi";
|
|
fsl,usbphy = <&usbh2phy>;
|
|
disable-over-current;
|
|
vbus-supply = <®_5p0v_main>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbphy0 {
|
|
vcc-supply = <&vusb_reg>;
|
|
};
|
|
|
|
&usbotg {
|
|
dr_mode = "host";
|
|
disable-over-current;
|
|
phy_type = "utmi_wide";
|
|
vbus-supply = <®_5p0v_main>;
|
|
status = "okay";
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_ampgpio: ampgpiogrp {
|
|
fsl,pins = <
|
|
MX51_PAD_GPIO1_9__GPIO1_9 0x5e
|
|
>;
|
|
};
|
|
|
|
pinctrl_audmux: audmuxgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0xa5
|
|
MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x85
|
|
MX51_PAD_AUD3_BB_CK__AUD3_TXC 0xa5
|
|
MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x85
|
|
>;
|
|
};
|
|
|
|
pinctrl_clk26mhz: clk26mhzgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_DI1_PIN12__GPIO3_1 0x85
|
|
>;
|
|
};
|
|
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
fsl,pins = <
|
|
MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
|
|
MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
|
|
MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
|
|
MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
|
|
MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
|
|
>;
|
|
};
|
|
|
|
pinctrl_esdhc1: esdhc1grp {
|
|
fsl,pins = <
|
|
MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
|
|
MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
|
|
MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
|
|
MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
|
|
MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
|
|
MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
|
|
>;
|
|
};
|
|
|
|
pinctrl_fec: fecgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_EIM_EB2__FEC_MDIO 0x1f5
|
|
MX51_PAD_NANDF_D9__FEC_RDATA0 0x2180
|
|
MX51_PAD_EIM_EB3__FEC_RDATA1 0x180
|
|
MX51_PAD_EIM_CS2__FEC_RDATA2 0x180
|
|
MX51_PAD_EIM_CS3__FEC_RDATA3 0x180
|
|
MX51_PAD_EIM_CS4__FEC_RX_ER 0x180
|
|
MX51_PAD_NANDF_D11__FEC_RX_DV 0x2084
|
|
MX51_PAD_EIM_CS5__FEC_CRS 0x180
|
|
MX51_PAD_NANDF_RB2__FEC_COL 0x2180
|
|
MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x2180
|
|
MX51_PAD_NANDF_CS2__FEC_TX_ER 0x2004
|
|
MX51_PAD_NANDF_CS3__FEC_MDC 0x2004
|
|
MX51_PAD_NANDF_D8__FEC_TDATA0 0x2180
|
|
MX51_PAD_NANDF_CS4__FEC_TDATA1 0x2004
|
|
MX51_PAD_NANDF_CS5__FEC_TDATA2 0x2004
|
|
MX51_PAD_NANDF_CS6__FEC_TDATA3 0x2004
|
|
MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x2004
|
|
MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x2180
|
|
MX51_PAD_EIM_A20__GPIO2_14 0x85
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpiospi0: gpiospi0grp {
|
|
fsl,pins = <
|
|
MX51_PAD_CSI2_D18__GPIO4_11 0x85
|
|
MX51_PAD_CSI2_D19__GPIO4_12 0x85
|
|
MX51_PAD_CSI2_HSYNC__GPIO4_14 0x85
|
|
MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x85
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
fsl,pins = <
|
|
MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
|
|
MX51_PAD_KEY_COL5__I2C2_SDA 0x400001ed
|
|
>;
|
|
};
|
|
|
|
pinctrl_ipu_disp1: ipudisp1grp {
|
|
fsl,pins = <
|
|
MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
|
|
MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
|
|
MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
|
|
MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
|
|
MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
|
|
MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
|
|
MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
|
|
MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
|
|
MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
|
|
MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
|
|
MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
|
|
MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
|
|
MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
|
|
MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
|
|
MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
|
|
MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
|
|
MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
|
|
MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
|
|
MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
|
|
MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
|
|
MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
|
|
MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
|
|
MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
|
|
MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
|
|
MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
|
|
MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
|
|
MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK 0x5
|
|
>;
|
|
};
|
|
|
|
pinctrl_panel: panelgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_DI1_D0_CS__GPIO3_3 0x85
|
|
>;
|
|
};
|
|
|
|
pinctrl_pmic: pmicgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_GPIO1_4__GPIO1_4 0x1e0
|
|
MX51_PAD_GPIO1_8__GPIO1_8 0x21e2
|
|
>;
|
|
};
|
|
|
|
pinctrl_sndgate26mhz: sndgate26mhzgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_CSPI1_RDY__GPIO4_26 0x85
|
|
>;
|
|
};
|
|
|
|
pinctrl_swi2c: swi2cgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_GPIO1_2__GPIO1_2 0xc5
|
|
MX51_PAD_DI1_D1_CS__GPIO3_4 0x400001f5
|
|
>;
|
|
};
|
|
|
|
pinctrl_swmdio: swmdiogrp {
|
|
fsl,pins = <
|
|
MX51_PAD_NANDF_D14__GPIO3_26 0x21e6
|
|
MX51_PAD_NANDF_D15__GPIO3_25 0x21e6
|
|
>;
|
|
};
|
|
|
|
pinctrl_ts: tsgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_CSI1_D8__GPIO3_12 0x85
|
|
MX51_PAD_CSI1_D9__GPIO3_13 0x85
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
|
|
MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
|
|
MX51_PAD_UART1_RTS__UART1_RTS 0x1c4
|
|
MX51_PAD_UART1_CTS__UART1_CTS 0x1c4
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
fsl,pins = <
|
|
MX51_PAD_UART2_RXD__UART2_RXD 0xc5
|
|
MX51_PAD_UART2_TXD__UART2_TXD 0xc5
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3: uart3grp {
|
|
fsl,pins = <
|
|
MX51_PAD_EIM_D25__UART3_RXD 0x1c5
|
|
MX51_PAD_EIM_D26__UART3_TXD 0x1c5
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbgate26mhz: usbgate26mhzgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_DISP2_DAT6__GPIO1_19 0x85
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbh1: usbh1grp {
|
|
fsl,pins = <
|
|
MX51_PAD_USBH1_STP__USBH1_STP 0x0
|
|
MX51_PAD_USBH1_CLK__USBH1_CLK 0x0
|
|
MX51_PAD_USBH1_DIR__USBH1_DIR 0x0
|
|
MX51_PAD_USBH1_NXT__USBH1_NXT 0x0
|
|
MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x0
|
|
MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x0
|
|
MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x0
|
|
MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x0
|
|
MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x0
|
|
MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x0
|
|
MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x0
|
|
MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbh1phy: usbh1phygrp {
|
|
fsl,pins = <
|
|
MX51_PAD_NANDF_D0__GPIO4_8 0x85
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbh2: usbh2grp {
|
|
fsl,pins = <
|
|
MX51_PAD_EIM_A26__USBH2_STP 0x0
|
|
MX51_PAD_EIM_A24__USBH2_CLK 0x0
|
|
MX51_PAD_EIM_A25__USBH2_DIR 0x0
|
|
MX51_PAD_EIM_A27__USBH2_NXT 0x0
|
|
MX51_PAD_EIM_D16__USBH2_DATA0 0x0
|
|
MX51_PAD_EIM_D17__USBH2_DATA1 0x0
|
|
MX51_PAD_EIM_D18__USBH2_DATA2 0x0
|
|
MX51_PAD_EIM_D19__USBH2_DATA3 0x0
|
|
MX51_PAD_EIM_D20__USBH2_DATA4 0x0
|
|
MX51_PAD_EIM_D21__USBH2_DATA5 0x0
|
|
MX51_PAD_EIM_D22__USBH2_DATA6 0x0
|
|
MX51_PAD_EIM_D23__USBH2_DATA7 0x0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbh2phy: usbh2phygrp {
|
|
fsl,pins = <
|
|
MX51_PAD_NANDF_D1__GPIO4_7 0x85
|
|
>;
|
|
};
|
|
};
|