Hans de Goede 76820fcf7a sunxi: clk: Set sun6i-pll1 n_start = 1 ... For all pll-s on sun6i n == 0 means use a multiplier of 1, rather then 0 as it means on sun4i / sun5i / sun7i. n_start = 1 is already correctly set for sun6i pll6, but was missing for pll1, this commit fixes this. Cc: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>		2015-01-25 16:55:25 +01:00
..
clk-a10-hosc.c	clk: sunxi: Move the 24M oscillator to a file of its own	2014-06-11 09:58:44 +02:00
clk-a20-gmac.c	clk: sunxi: gmac-tx-clk mux is not a CLK_MUX_INDEX_BIT mux	2014-11-23 17:02:57 +01:00
clk-factors.c	clk: sunxi: Give sunxi_factors_register a registers parameter	2014-12-21 23:51:37 +01:00
clk-factors.h	clk: sunxi: Give sunxi_factors_register a registers parameter	2014-12-21 23:51:37 +01:00
clk-mod0.c	clk: sunxi: Add mod0 and mmc module clock support for A80	2015-01-19 22:48:55 +01:00
clk-sun6i-apb0-gates.c	clk: Remove .owner field for driver	2014-09-25 17:43:31 -07:00
clk-sun6i-apb0.c	clk: Remove .owner field for driver	2014-09-25 17:43:31 -07:00
clk-sun6i-ar100.c	clk: Change clk_ops->determine_rate to return a clk_hw as the best parent	2014-12-03 16:21:37 -08:00
clk-sun8i-apb0.c	clk: Remove .owner field for driver	2014-09-25 17:43:31 -07:00
clk-sun8i-mbus.c	clk: sunxi: Give sunxi_factors_register a registers parameter	2014-12-21 23:51:37 +01:00
clk-sun9i-core.c	clk: sunxi: rewrite sun9i_a80_get_pll4_factors()	2015-01-25 16:55:13 +01:00
clk-sun9i-mmc.c	clk: sunxi: Add driver for A80 MMC config clocks/resets	2015-01-20 17:14:38 +01:00
clk-sunxi.c	sunxi: clk: Set sun6i-pll1 n_start = 1	2015-01-25 16:55:25 +01:00
Makefile	clk: sunxi: Add driver for A80 MMC config clocks/resets	2015-01-20 17:14:38 +01:00