Guo Ren aefd9461d3 csky: Fixup cpu speculative execution to IO area ... For the memory size ( > 512MB, < 1GB), the MSA setting is: - SSEG0: PHY_START , PHY_START + 512MB - SSEG1: PHY_START + 512MB, PHY_START + 1GB But the real memory is no more than 1GB, there is a gap between the end size of memory and border of 1GB. CPU could speculatively execute to that gap and if the gap of the bus couldn't respond to the CPU request, then the crash will happen. Now make the setting with: - SSEG0: PHY_START , PHY_START + 512MB (no change) - SSEG1: Disabled (We use highmem to use the memory of 512MB~1GB) We also deprecated zhole_szie[] settings, it's only used by arm style CPUs. All memory gap should use Reserved setting of dts in csky system. Signed-off-by: Guo Ren <guoren@linux.alibaba.com>		2020-04-03 12:40:07 +08:00
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cacheflush.h	csky: Add flush_icache_mm to defer flush icache all	2020-02-21 15:43:24 +08:00
ckmmu.h	csky: Use generic asid algorithm to implement switch_mm	2019-07-19 14:21:36 +08:00
elf.h	csky: ELF and module probe	2018-10-26 00:54:23 +08:00
entry.h	csky: Fixup cpu speculative execution to IO area	2020-04-03 12:40:07 +08:00
page.h	csky: Fixup arch_get_unmapped_area() implementation	2019-08-20 16:09:37 +08:00
pgtable-bits.h	csky: fixup abiv2 mmap(... O_SYNC) failed.	2018-12-31 10:56:45 +08:00
reg_ops.h	csky: Misc headers	2018-10-26 00:54:26 +08:00
regdef.h	csky: Add perf_arch_fetch_caller_regs support	2019-04-22 13:44:57 +08:00
string.h	csky: Fixup abiv1 memset error	2019-07-19 14:21:36 +08:00
switch_context.h	csky: fixup save hi,lo,dspcr regs in switch_stack.	2018-12-31 22:57:27 +08:00
vdso.h	csky: VDSO and rt_sigreturn	2018-10-26 00:54:22 +08:00