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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 of the license extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 315 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Armijn Hemel <armijn@tjaldur.nl> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190115.503150771@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
181 lines
4.3 KiB
C
181 lines
4.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _ASM_X86_XOR_AVX_H
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#define _ASM_X86_XOR_AVX_H
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/*
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* Optimized RAID-5 checksumming functions for AVX
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*
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* Copyright (C) 2012 Intel Corporation
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* Author: Jim Kukunas <james.t.kukunas@linux.intel.com>
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*
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* Based on Ingo Molnar and Zach Brown's respective MMX and SSE routines
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*/
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#ifdef CONFIG_AS_AVX
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#include <linux/compiler.h>
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#include <asm/fpu/api.h>
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#define BLOCK4(i) \
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BLOCK(32 * i, 0) \
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BLOCK(32 * (i + 1), 1) \
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BLOCK(32 * (i + 2), 2) \
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BLOCK(32 * (i + 3), 3)
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#define BLOCK16() \
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BLOCK4(0) \
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BLOCK4(4) \
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BLOCK4(8) \
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BLOCK4(12)
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static void xor_avx_2(unsigned long bytes, unsigned long *p0, unsigned long *p1)
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{
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unsigned long lines = bytes >> 9;
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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#define BLOCK(i, reg) \
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do { \
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asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p1[i / sizeof(*p1)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p0[i / sizeof(*p0)])); \
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asm volatile("vmovdqa %%ymm" #reg ", %0" : \
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"=m" (p0[i / sizeof(*p0)])); \
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} while (0);
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BLOCK16()
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p0 = (unsigned long *)((uintptr_t)p0 + 512);
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p1 = (unsigned long *)((uintptr_t)p1 + 512);
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}
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kernel_fpu_end();
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}
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static void xor_avx_3(unsigned long bytes, unsigned long *p0, unsigned long *p1,
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unsigned long *p2)
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{
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unsigned long lines = bytes >> 9;
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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#define BLOCK(i, reg) \
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do { \
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asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p2[i / sizeof(*p2)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p1[i / sizeof(*p1)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p0[i / sizeof(*p0)])); \
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asm volatile("vmovdqa %%ymm" #reg ", %0" : \
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"=m" (p0[i / sizeof(*p0)])); \
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} while (0);
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BLOCK16()
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p0 = (unsigned long *)((uintptr_t)p0 + 512);
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p1 = (unsigned long *)((uintptr_t)p1 + 512);
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p2 = (unsigned long *)((uintptr_t)p2 + 512);
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}
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kernel_fpu_end();
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}
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static void xor_avx_4(unsigned long bytes, unsigned long *p0, unsigned long *p1,
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unsigned long *p2, unsigned long *p3)
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{
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unsigned long lines = bytes >> 9;
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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#define BLOCK(i, reg) \
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do { \
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asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p3[i / sizeof(*p3)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p2[i / sizeof(*p2)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p1[i / sizeof(*p1)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p0[i / sizeof(*p0)])); \
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asm volatile("vmovdqa %%ymm" #reg ", %0" : \
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"=m" (p0[i / sizeof(*p0)])); \
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} while (0);
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BLOCK16();
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p0 = (unsigned long *)((uintptr_t)p0 + 512);
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p1 = (unsigned long *)((uintptr_t)p1 + 512);
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p2 = (unsigned long *)((uintptr_t)p2 + 512);
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p3 = (unsigned long *)((uintptr_t)p3 + 512);
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}
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kernel_fpu_end();
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}
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static void xor_avx_5(unsigned long bytes, unsigned long *p0, unsigned long *p1,
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unsigned long *p2, unsigned long *p3, unsigned long *p4)
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{
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unsigned long lines = bytes >> 9;
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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#define BLOCK(i, reg) \
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do { \
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asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p4[i / sizeof(*p4)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p3[i / sizeof(*p3)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p2[i / sizeof(*p2)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p1[i / sizeof(*p1)])); \
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asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \
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"m" (p0[i / sizeof(*p0)])); \
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asm volatile("vmovdqa %%ymm" #reg ", %0" : \
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"=m" (p0[i / sizeof(*p0)])); \
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} while (0);
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BLOCK16()
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p0 = (unsigned long *)((uintptr_t)p0 + 512);
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p1 = (unsigned long *)((uintptr_t)p1 + 512);
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p2 = (unsigned long *)((uintptr_t)p2 + 512);
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p3 = (unsigned long *)((uintptr_t)p3 + 512);
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p4 = (unsigned long *)((uintptr_t)p4 + 512);
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}
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kernel_fpu_end();
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}
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static struct xor_block_template xor_block_avx = {
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.name = "avx",
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.do_2 = xor_avx_2,
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.do_3 = xor_avx_3,
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.do_4 = xor_avx_4,
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.do_5 = xor_avx_5,
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};
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#define AVX_XOR_SPEED \
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do { \
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if (boot_cpu_has(X86_FEATURE_AVX) && boot_cpu_has(X86_FEATURE_OSXSAVE)) \
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xor_speed(&xor_block_avx); \
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} while (0)
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#define AVX_SELECT(FASTEST) \
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(boot_cpu_has(X86_FEATURE_AVX) && boot_cpu_has(X86_FEATURE_OSXSAVE) ? &xor_block_avx : FASTEST)
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#else
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#define AVX_XOR_SPEED {}
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#define AVX_SELECT(FASTEST) (FASTEST)
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#endif
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#endif
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