mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 23:26:45 +07:00
760ee1c4aa
The ep93xx DMA controller has 10 independent memory to peripheral (M2P) channels, and 2 dedicated memory to memory (M2M) channels. M2M channels can also be used by SPI and IDE to perform DMA transfers to/from their memory mapped FIFOs. This driver supports both M2P and M2M channels with DMA_SLAVE, DMA_CYCLIC and DMA_MEMCPY (M2M only) capabilities. Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by: Ryan Mallon <rmallon@gmail.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
283 lines
7.5 KiB
Plaintext
283 lines
7.5 KiB
Plaintext
#
|
|
# DMA engine configuration
|
|
#
|
|
|
|
menuconfig DMADEVICES
|
|
bool "DMA Engine support"
|
|
depends on HAS_DMA
|
|
help
|
|
DMA engines can do asynchronous data transfers without
|
|
involving the host CPU. Currently, this framework can be
|
|
used to offload memory copies in the network stack and
|
|
RAID operations in the MD driver. This menu only presents
|
|
DMA Device drivers supported by the configured arch, it may
|
|
be empty in some cases.
|
|
|
|
config DMADEVICES_DEBUG
|
|
bool "DMA Engine debugging"
|
|
depends on DMADEVICES != n
|
|
help
|
|
This is an option for use by developers; most people should
|
|
say N here. This enables DMA engine core and driver debugging.
|
|
|
|
config DMADEVICES_VDEBUG
|
|
bool "DMA Engine verbose debugging"
|
|
depends on DMADEVICES_DEBUG != n
|
|
help
|
|
This is an option for use by developers; most people should
|
|
say N here. This enables deeper (more verbose) debugging of
|
|
the DMA engine core and drivers.
|
|
|
|
|
|
if DMADEVICES
|
|
|
|
comment "DMA Devices"
|
|
|
|
config INTEL_MID_DMAC
|
|
tristate "Intel MID DMA support for Peripheral DMA controllers"
|
|
depends on PCI && X86
|
|
select DMA_ENGINE
|
|
default n
|
|
help
|
|
Enable support for the Intel(R) MID DMA engine present
|
|
in Intel MID chipsets.
|
|
|
|
Say Y here if you have such a chipset.
|
|
|
|
If unsure, say N.
|
|
|
|
config ASYNC_TX_ENABLE_CHANNEL_SWITCH
|
|
bool
|
|
|
|
config AMBA_PL08X
|
|
bool "ARM PrimeCell PL080 or PL081 support"
|
|
depends on ARM_AMBA && EXPERIMENTAL
|
|
select DMA_ENGINE
|
|
help
|
|
Platform has a PL08x DMAC device
|
|
which can provide DMA engine support
|
|
|
|
config INTEL_IOATDMA
|
|
tristate "Intel I/OAT DMA support"
|
|
depends on PCI && X86
|
|
select DMA_ENGINE
|
|
select DCA
|
|
select ASYNC_TX_DISABLE_PQ_VAL_DMA
|
|
select ASYNC_TX_DISABLE_XOR_VAL_DMA
|
|
help
|
|
Enable support for the Intel(R) I/OAT DMA engine present
|
|
in recent Intel Xeon chipsets.
|
|
|
|
Say Y here if you have such a chipset.
|
|
|
|
If unsure, say N.
|
|
|
|
config INTEL_IOP_ADMA
|
|
tristate "Intel IOP ADMA support"
|
|
depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
|
|
select DMA_ENGINE
|
|
select ASYNC_TX_ENABLE_CHANNEL_SWITCH
|
|
help
|
|
Enable support for the Intel(R) IOP Series RAID engines.
|
|
|
|
config DW_DMAC
|
|
tristate "Synopsys DesignWare AHB DMA support"
|
|
depends on HAVE_CLK
|
|
select DMA_ENGINE
|
|
default y if CPU_AT32AP7000
|
|
help
|
|
Support the Synopsys DesignWare AHB DMA controller. This
|
|
can be integrated in chips such as the Atmel AT32ap7000.
|
|
|
|
config AT_HDMAC
|
|
tristate "Atmel AHB DMA support"
|
|
depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
|
|
select DMA_ENGINE
|
|
help
|
|
Support the Atmel AHB DMA controller. This can be integrated in
|
|
chips such as the Atmel AT91SAM9RL.
|
|
|
|
config FSL_DMA
|
|
tristate "Freescale Elo and Elo Plus DMA support"
|
|
depends on FSL_SOC
|
|
select DMA_ENGINE
|
|
select ASYNC_TX_ENABLE_CHANNEL_SWITCH
|
|
---help---
|
|
Enable support for the Freescale Elo and Elo Plus DMA controllers.
|
|
The Elo is the DMA controller on some 82xx and 83xx parts, and the
|
|
Elo Plus is the DMA controller on 85xx and 86xx parts.
|
|
|
|
config MPC512X_DMA
|
|
tristate "Freescale MPC512x built-in DMA engine support"
|
|
depends on PPC_MPC512x || PPC_MPC831x
|
|
select DMA_ENGINE
|
|
---help---
|
|
Enable support for the Freescale MPC512x built-in DMA engine.
|
|
|
|
config MV_XOR
|
|
bool "Marvell XOR engine support"
|
|
depends on PLAT_ORION
|
|
select DMA_ENGINE
|
|
select ASYNC_TX_ENABLE_CHANNEL_SWITCH
|
|
---help---
|
|
Enable support for the Marvell XOR engine.
|
|
|
|
config MX3_IPU
|
|
bool "MX3x Image Processing Unit support"
|
|
depends on ARCH_MX3
|
|
select DMA_ENGINE
|
|
default y
|
|
help
|
|
If you plan to use the Image Processing unit in the i.MX3x, say
|
|
Y here. If unsure, select Y.
|
|
|
|
config MX3_IPU_IRQS
|
|
int "Number of dynamically mapped interrupts for IPU"
|
|
depends on MX3_IPU
|
|
range 2 137
|
|
default 4
|
|
help
|
|
Out of 137 interrupt sources on i.MX31 IPU only very few are used.
|
|
To avoid bloating the irq_desc[] array we allocate a sufficient
|
|
number of IRQ slots and map them dynamically to specific sources.
|
|
|
|
config TXX9_DMAC
|
|
tristate "Toshiba TXx9 SoC DMA support"
|
|
depends on MACH_TX49XX || MACH_TX39XX
|
|
select DMA_ENGINE
|
|
help
|
|
Support the TXx9 SoC internal DMA controller. This can be
|
|
integrated in chips such as the Toshiba TX4927/38/39.
|
|
|
|
config SH_DMAE
|
|
tristate "Renesas SuperH DMAC support"
|
|
depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
|
|
depends on !SH_DMA_API
|
|
select DMA_ENGINE
|
|
help
|
|
Enable support for the Renesas SuperH DMA controllers.
|
|
|
|
config COH901318
|
|
bool "ST-Ericsson COH901318 DMA support"
|
|
select DMA_ENGINE
|
|
depends on ARCH_U300
|
|
help
|
|
Enable support for ST-Ericsson COH 901 318 DMA.
|
|
|
|
config STE_DMA40
|
|
bool "ST-Ericsson DMA40 support"
|
|
depends on ARCH_U8500
|
|
select DMA_ENGINE
|
|
help
|
|
Support for ST-Ericsson DMA40 controller
|
|
|
|
config AMCC_PPC440SPE_ADMA
|
|
tristate "AMCC PPC440SPe ADMA support"
|
|
depends on 440SPe || 440SP
|
|
select DMA_ENGINE
|
|
select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
|
|
select ASYNC_TX_ENABLE_CHANNEL_SWITCH
|
|
help
|
|
Enable support for the AMCC PPC440SPe RAID engines.
|
|
|
|
config TIMB_DMA
|
|
tristate "Timberdale FPGA DMA support"
|
|
depends on MFD_TIMBERDALE || HAS_IOMEM
|
|
select DMA_ENGINE
|
|
help
|
|
Enable support for the Timberdale FPGA DMA engine.
|
|
|
|
config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
|
|
bool
|
|
|
|
config PL330_DMA
|
|
tristate "DMA API Driver for PL330"
|
|
select DMA_ENGINE
|
|
depends on PL330
|
|
help
|
|
Select if your platform has one or more PL330 DMACs.
|
|
You need to provide platform specific settings via
|
|
platform_data for a dma-pl330 device.
|
|
|
|
config PCH_DMA
|
|
tristate "Intel EG20T PCH / OKI Semi IOH(ML7213/ML7223) DMA support"
|
|
depends on PCI && X86
|
|
select DMA_ENGINE
|
|
help
|
|
Enable support for Intel EG20T PCH DMA engine.
|
|
|
|
This driver also can be used for OKI SEMICONDUCTOR IOH(Input/
|
|
Output Hub), ML7213 and ML7223.
|
|
ML7213 IOH is for IVI(In-Vehicle Infotainment) use and ML7223 IOH is
|
|
for MP(Media Phone) use.
|
|
ML7213/ML7223 is companion chip for Intel Atom E6xx series.
|
|
ML7213/ML7223 is completely compatible for Intel EG20T PCH.
|
|
|
|
config IMX_SDMA
|
|
tristate "i.MX SDMA support"
|
|
depends on ARCH_MX25 || ARCH_MX3 || ARCH_MX5
|
|
select DMA_ENGINE
|
|
help
|
|
Support the i.MX SDMA engine. This engine is integrated into
|
|
Freescale i.MX25/31/35/51 chips.
|
|
|
|
config IMX_DMA
|
|
tristate "i.MX DMA support"
|
|
depends on IMX_HAVE_DMA_V1
|
|
select DMA_ENGINE
|
|
help
|
|
Support the i.MX DMA engine. This engine is integrated into
|
|
Freescale i.MX1/21/27 chips.
|
|
|
|
config MXS_DMA
|
|
bool "MXS DMA support"
|
|
depends on SOC_IMX23 || SOC_IMX28
|
|
select DMA_ENGINE
|
|
help
|
|
Support the MXS DMA engine. This engine including APBH-DMA
|
|
and APBX-DMA is integrated into Freescale i.MX23/28 chips.
|
|
|
|
config EP93XX_DMA
|
|
bool "Cirrus Logic EP93xx DMA support"
|
|
depends on ARCH_EP93XX
|
|
select DMA_ENGINE
|
|
help
|
|
Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
|
|
|
|
config DMA_ENGINE
|
|
bool
|
|
|
|
comment "DMA Clients"
|
|
depends on DMA_ENGINE
|
|
|
|
config NET_DMA
|
|
bool "Network: TCP receive copy offload"
|
|
depends on DMA_ENGINE && NET
|
|
default (INTEL_IOATDMA || FSL_DMA)
|
|
help
|
|
This enables the use of DMA engines in the network stack to
|
|
offload receive copy-to-user operations, freeing CPU cycles.
|
|
|
|
Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
|
|
say N.
|
|
|
|
config ASYNC_TX_DMA
|
|
bool "Async_tx: Offload support for the async_tx api"
|
|
depends on DMA_ENGINE
|
|
help
|
|
This allows the async_tx api to take advantage of offload engines for
|
|
memcpy, memset, xor, and raid6 p+q operations. If your platform has
|
|
a dma engine that can perform raid operations and you have enabled
|
|
MD_RAID456 say Y.
|
|
|
|
If unsure, say N.
|
|
|
|
config DMATEST
|
|
tristate "DMA Test client"
|
|
depends on DMA_ENGINE
|
|
help
|
|
Simple DMA test client. Say N unless you're debugging a
|
|
DMA Device driver.
|
|
|
|
endif
|