mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 10:05:19 +07:00
e45282829a
This removes the dependency of the driver on CONFIG_USB_DEBUG and moves it to us the dynamic debug subsystem instead. Bonus is the fact that we can now properly determine the exact hardware that is spitting out the messages. This lets debugging be enabled without having to rebuild the driver, an important thing for users that can not do it. Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
250 lines
6.3 KiB
C
250 lines
6.3 KiB
C
/*
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* SL811HS register declarations and HCD data structures
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*
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* Copyright (C) 2004 Psion Teklogix
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* Copyright (C) 2004 David Brownell
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* Copyright (C) 2001 Cypress Semiconductor Inc.
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*/
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/*
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* SL811HS has transfer registers, and control registers. In host/master
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* mode one set of registers is used; in peripheral/slave mode, another.
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* - SL11H only has some "A" transfer registers from 0x00-0x04
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* - SL811HS also has "B" registers from 0x08-0x0c
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* - SL811S (or HS in slave mode) has four A+B sets, at 00, 10, 20, 30
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*/
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#define SL811_EP_A(base) ((base) + 0)
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#define SL811_EP_B(base) ((base) + 8)
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#define SL811_HOST_BUF 0x00
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#define SL811_PERIPH_EP0 0x00
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#define SL811_PERIPH_EP1 0x10
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#define SL811_PERIPH_EP2 0x20
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#define SL811_PERIPH_EP3 0x30
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/* TRANSFER REGISTERS: host and peripheral sides are similar
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* except for the control models (master vs slave).
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*/
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#define SL11H_HOSTCTLREG 0
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# define SL11H_HCTLMASK_ARM 0x01
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# define SL11H_HCTLMASK_ENABLE 0x02
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# define SL11H_HCTLMASK_IN 0x00
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# define SL11H_HCTLMASK_OUT 0x04
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# define SL11H_HCTLMASK_ISOCH 0x10
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# define SL11H_HCTLMASK_AFTERSOF 0x20
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# define SL11H_HCTLMASK_TOGGLE 0x40
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# define SL11H_HCTLMASK_PREAMBLE 0x80
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#define SL11H_BUFADDRREG 1
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#define SL11H_BUFLNTHREG 2
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#define SL11H_PKTSTATREG 3 /* read */
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# define SL11H_STATMASK_ACK 0x01
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# define SL11H_STATMASK_ERROR 0x02
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# define SL11H_STATMASK_TMOUT 0x04
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# define SL11H_STATMASK_SEQ 0x08
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# define SL11H_STATMASK_SETUP 0x10
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# define SL11H_STATMASK_OVF 0x20
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# define SL11H_STATMASK_NAK 0x40
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# define SL11H_STATMASK_STALL 0x80
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#define SL11H_PIDEPREG 3 /* write */
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# define SL_SETUP 0xd0
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# define SL_IN 0x90
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# define SL_OUT 0x10
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# define SL_SOF 0x50
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# define SL_PREAMBLE 0xc0
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# define SL_NAK 0xa0
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# define SL_STALL 0xe0
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# define SL_DATA0 0x30
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# define SL_DATA1 0xb0
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#define SL11H_XFERCNTREG 4 /* read */
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#define SL11H_DEVADDRREG 4 /* write */
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/* CONTROL REGISTERS: host and peripheral are very different.
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*/
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#define SL11H_CTLREG1 5
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# define SL11H_CTL1MASK_SOF_ENA 0x01
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# define SL11H_CTL1MASK_FORCE 0x18
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# define SL11H_CTL1MASK_NORMAL 0x00
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# define SL11H_CTL1MASK_SE0 0x08 /* reset */
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# define SL11H_CTL1MASK_J 0x10
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# define SL11H_CTL1MASK_K 0x18 /* resume */
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# define SL11H_CTL1MASK_LSPD 0x20
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# define SL11H_CTL1MASK_SUSPEND 0x40
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#define SL11H_IRQ_ENABLE 6
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# define SL11H_INTMASK_DONE_A 0x01
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# define SL11H_INTMASK_DONE_B 0x02
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# define SL11H_INTMASK_SOFINTR 0x10
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# define SL11H_INTMASK_INSRMV 0x20 /* to/from SE0 */
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# define SL11H_INTMASK_RD 0x40
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# define SL11H_INTMASK_DP 0x80 /* only in INTSTATREG */
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#define SL11S_ADDRESS 7
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/* 0x08-0x0c are for the B buffer (not in SL11) */
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#define SL11H_IRQ_STATUS 0x0D /* write to ack */
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#define SL11H_HWREVREG 0x0E /* read */
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# define SL11H_HWRMASK_HWREV 0xF0
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#define SL11H_SOFLOWREG 0x0E /* write */
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#define SL11H_SOFTMRREG 0x0F /* read */
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/* a write to this register enables SL811HS features.
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* HOST flag presumably overrides the chip input signal?
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*/
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#define SL811HS_CTLREG2 0x0F
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# define SL811HS_CTL2MASK_SOF_MASK 0x3F
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# define SL811HS_CTL2MASK_DSWAP 0x40
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# define SL811HS_CTL2MASK_HOST 0x80
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#define SL811HS_CTL2_INIT (SL811HS_CTL2MASK_HOST | 0x2e)
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/* DATA BUFFERS: registers from 0x10..0xff are for data buffers;
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* that's 240 bytes, which we'll split evenly between A and B sides.
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* Only ISO can use more than 64 bytes per packet.
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* (The SL11S has 0x40..0xff for buffers.)
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*/
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#define H_MAXPACKET 120 /* bytes in A or B fifos */
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#define SL11H_DATA_START 0x10
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#define SL811HS_PACKET_BUF(is_a) ((is_a) \
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? SL11H_DATA_START \
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: (SL11H_DATA_START + H_MAXPACKET))
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/*-------------------------------------------------------------------------*/
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#define LOG2_PERIODIC_SIZE 5 /* arbitrary; this matches OHCI */
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#define PERIODIC_SIZE (1 << LOG2_PERIODIC_SIZE)
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struct sl811 {
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spinlock_t lock;
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void __iomem *addr_reg;
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void __iomem *data_reg;
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struct sl811_platform_data *board;
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struct proc_dir_entry *pde;
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unsigned long stat_insrmv;
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unsigned long stat_wake;
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unsigned long stat_sof;
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unsigned long stat_a;
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unsigned long stat_b;
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unsigned long stat_lost;
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unsigned long stat_overrun;
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/* sw model */
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struct timer_list timer;
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struct sl811h_ep *next_periodic;
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struct sl811h_ep *next_async;
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struct sl811h_ep *active_a;
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unsigned long jiffies_a;
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struct sl811h_ep *active_b;
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unsigned long jiffies_b;
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u32 port1;
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u8 ctrl1, ctrl2, irq_enable;
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u16 frame;
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/* async schedule: control, bulk */
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struct list_head async;
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/* periodic schedule: interrupt, iso */
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u16 load[PERIODIC_SIZE];
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struct sl811h_ep *periodic[PERIODIC_SIZE];
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unsigned periodic_count;
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};
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static inline struct sl811 *hcd_to_sl811(struct usb_hcd *hcd)
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{
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return (struct sl811 *) (hcd->hcd_priv);
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}
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static inline struct usb_hcd *sl811_to_hcd(struct sl811 *sl811)
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{
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return container_of((void *) sl811, struct usb_hcd, hcd_priv);
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}
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struct sl811h_ep {
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struct usb_host_endpoint *hep;
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struct usb_device *udev;
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u8 defctrl;
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u8 maxpacket;
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u8 epnum;
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u8 nextpid;
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u16 error_count;
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u16 nak_count;
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u16 length; /* of current packet */
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/* periodic schedule */
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u16 period;
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u16 branch;
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u16 load;
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struct sl811h_ep *next;
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/* async schedule */
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struct list_head schedule;
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};
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/*-------------------------------------------------------------------------*/
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/* These register utilities should work for the SL811S register API too
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* NOTE: caller must hold sl811->lock.
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*/
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static inline u8 sl811_read(struct sl811 *sl811, int reg)
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{
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writeb(reg, sl811->addr_reg);
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return readb(sl811->data_reg);
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}
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static inline void sl811_write(struct sl811 *sl811, int reg, u8 val)
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{
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writeb(reg, sl811->addr_reg);
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writeb(val, sl811->data_reg);
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}
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static inline void
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sl811_write_buf(struct sl811 *sl811, int addr, const void *buf, size_t count)
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{
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const u8 *data;
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void __iomem *data_reg;
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if (!count)
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return;
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writeb(addr, sl811->addr_reg);
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data = buf;
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data_reg = sl811->data_reg;
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do {
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writeb(*data++, data_reg);
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} while (--count);
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}
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static inline void
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sl811_read_buf(struct sl811 *sl811, int addr, void *buf, size_t count)
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{
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u8 *data;
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void __iomem *data_reg;
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if (!count)
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return;
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writeb(addr, sl811->addr_reg);
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data = buf;
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data_reg = sl811->data_reg;
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do {
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*data++ = readb(data_reg);
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} while (--count);
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}
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/*-------------------------------------------------------------------------*/
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#ifdef PACKET_TRACE
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# define PACKET pr_debug("sl811: "stuff)
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#else
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# define PACKET(stuff...) do{}while(0)
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#endif
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