Paul Burton 4d03551692 MIPS: Enable L2 prefetching for CM >= 2.5 ... On systems with CM 2.5 & beyond there may be L2 prefetch units present which are not enabled by default. Detect them, configuring & enabling prefetching when available. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: James Hogan <james.hogan@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/11180/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2015-10-26 09:49:41 +01:00
..
c-octeon.c
c-r3k.c
c-r4k.c	MIPS: Add cases for CPU_I6400	2015-08-26 15:23:03 +02:00
c-tx39.c
cache.c	MIPS: Partially disable RIXI support.	2015-08-03 09:25:11 +02:00
cerr-sb1.c
cex-gen.S
cex-oct.S
cex-sb1.S
dma-default.c	MIPS: dma-default: Fix 32-bit fall back to GFP_DMA	2015-09-30 16:27:39 +02:00
extable.c
fault.c	MIPS: Set trap_no field in thread_struct on exception.	2015-09-03 12:08:04 +02:00
gup.c
highmem.c
hugetlbpage.c	mm/hugetlb: reduce arch dependent code about huge_pmd_unshare	2015-06-24 17:49:41 -07:00
init.c	MIPS: Initialise MAARs on secondary CPUs	2015-09-27 14:15:26 +02:00
ioremap.c
Makefile
mmap.c
page-funcs.S
page.c
pgtable-32.c
pgtable-64.c
sc-ip22.c
sc-mips.c	MIPS: Enable L2 prefetching for CM >= 2.5	2015-10-26 09:49:41 +01:00
sc-r5k.c
sc-rm7k.c
tlb-funcs.S
tlb-r3k.c	MIPS: Refactor dumping of TLB registers for r3k/r4k	2015-09-03 12:07:45 +02:00
tlb-r4k.c
tlb-r8k.c
tlbex-fault.S
tlbex.c
uasm-micromips.c
uasm-mips.c
uasm.c