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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 05:46:47 +07:00
bc1b1fb275
The grf5101 RF code needs to invoke grf5101_write_phy_antenna every time the channel is being switch. This should be done passing the channel number to that function. Incorrectly we were passing the same value that is written on the channel RF register. This may cause problems when operating on ch 14. This patch fixes it. Thanks to Alessandro Di Marco who found this issue! Signed-off-by: Andrea Merello <andreamrl@tiscali.it> Signed-off-by: John W. Linville <linville@tuxdriver.com>
181 lines
4.8 KiB
C
181 lines
4.8 KiB
C
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/*
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* Radio tuning for GCT GRF5101 on RTL8180
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*
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* Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
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*
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* Code from the BSD driver and the rtl8181 project have been
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* very useful to understand certain things
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*
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* I want to thanks the Authors of such projects and the Ndiswrapper
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* project Authors.
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*
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* A special Big Thanks also is for all people who donated me cards,
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* making possible the creation of the original rtl8180 driver
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* from which this code is derived!
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <net/mac80211.h>
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#include "rtl8180.h"
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#include "rtl8180_grf5101.h"
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static const int grf5101_encode[] = {
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0x0, 0x8, 0x4, 0xC,
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0x2, 0xA, 0x6, 0xE,
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0x1, 0x9, 0x5, 0xD,
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0x3, 0xB, 0x7, 0xF
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};
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static void write_grf5101(struct ieee80211_hw *dev, u8 addr, u32 data)
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{
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struct rtl8180_priv *priv = dev->priv;
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u32 phy_config;
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phy_config = grf5101_encode[(data >> 8) & 0xF];
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phy_config |= grf5101_encode[(data >> 4) & 0xF] << 4;
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phy_config |= grf5101_encode[data & 0xF] << 8;
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phy_config |= grf5101_encode[(addr >> 1) & 0xF] << 12;
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phy_config |= (addr & 1) << 16;
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phy_config |= grf5101_encode[(data & 0xf000) >> 12] << 24;
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/* MAC will bang bits to the chip */
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phy_config |= 0x90000000;
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rtl818x_iowrite32(priv,
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(__le32 __iomem *) &priv->map->RFPinsOutput, phy_config);
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msleep(3);
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}
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static void grf5101_write_phy_antenna(struct ieee80211_hw *dev, short chan)
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{
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struct rtl8180_priv *priv = dev->priv;
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u8 ant = GRF5101_ANTENNA;
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if (priv->rfparam & RF_PARAM_ANTBDEFAULT)
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ant |= BB_ANTENNA_B;
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if (chan == 14)
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ant |= BB_ANTATTEN_CHAN14;
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rtl8180_write_phy(dev, 0x10, ant);
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}
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static void grf5101_rf_set_channel(struct ieee80211_hw *dev,
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struct ieee80211_conf *conf)
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{
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struct rtl8180_priv *priv = dev->priv;
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int channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
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u32 txpw = priv->channels[channel - 1].hw_value & 0xFF;
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u32 chan = channel - 1;
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/* set TX power */
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write_grf5101(dev, 0x15, 0x0);
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write_grf5101(dev, 0x06, txpw);
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write_grf5101(dev, 0x15, 0x10);
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write_grf5101(dev, 0x15, 0x0);
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/* set frequency */
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write_grf5101(dev, 0x07, 0x0);
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write_grf5101(dev, 0x0B, chan);
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write_grf5101(dev, 0x07, 0x1000);
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grf5101_write_phy_antenna(dev, channel);
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}
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static void grf5101_rf_stop(struct ieee80211_hw *dev)
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{
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struct rtl8180_priv *priv = dev->priv;
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u32 anaparam;
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anaparam = priv->anaparam;
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anaparam &= 0x000fffff;
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anaparam |= 0x3f900000;
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rtl8180_set_anaparam(priv, anaparam);
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write_grf5101(dev, 0x07, 0x0);
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write_grf5101(dev, 0x1f, 0x45);
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write_grf5101(dev, 0x1f, 0x5);
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write_grf5101(dev, 0x00, 0x8e4);
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}
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static void grf5101_rf_init(struct ieee80211_hw *dev)
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{
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struct rtl8180_priv *priv = dev->priv;
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rtl8180_set_anaparam(priv, priv->anaparam);
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write_grf5101(dev, 0x1f, 0x0);
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write_grf5101(dev, 0x1f, 0x0);
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write_grf5101(dev, 0x1f, 0x40);
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write_grf5101(dev, 0x1f, 0x60);
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write_grf5101(dev, 0x1f, 0x61);
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write_grf5101(dev, 0x1f, 0x61);
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write_grf5101(dev, 0x00, 0xae4);
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write_grf5101(dev, 0x1f, 0x1);
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write_grf5101(dev, 0x1f, 0x41);
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write_grf5101(dev, 0x1f, 0x61);
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write_grf5101(dev, 0x01, 0x1a23);
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write_grf5101(dev, 0x02, 0x4971);
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write_grf5101(dev, 0x03, 0x41de);
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write_grf5101(dev, 0x04, 0x2d80);
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write_grf5101(dev, 0x05, 0x68ff); /* 0x61ff original value */
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write_grf5101(dev, 0x06, 0x0);
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write_grf5101(dev, 0x07, 0x0);
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write_grf5101(dev, 0x08, 0x7533);
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write_grf5101(dev, 0x09, 0xc401);
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write_grf5101(dev, 0x0a, 0x0);
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write_grf5101(dev, 0x0c, 0x1c7);
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write_grf5101(dev, 0x0d, 0x29d3);
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write_grf5101(dev, 0x0e, 0x2e8);
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write_grf5101(dev, 0x10, 0x192);
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write_grf5101(dev, 0x11, 0x248);
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write_grf5101(dev, 0x12, 0x0);
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write_grf5101(dev, 0x13, 0x20c4);
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write_grf5101(dev, 0x14, 0xf4fc);
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write_grf5101(dev, 0x15, 0x0);
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write_grf5101(dev, 0x16, 0x1500);
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write_grf5101(dev, 0x07, 0x1000);
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/* baseband configuration */
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rtl8180_write_phy(dev, 0, 0xa8);
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rtl8180_write_phy(dev, 3, 0x0);
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rtl8180_write_phy(dev, 4, 0xc0);
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rtl8180_write_phy(dev, 5, 0x90);
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rtl8180_write_phy(dev, 6, 0x1e);
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rtl8180_write_phy(dev, 7, 0x64);
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grf5101_write_phy_antenna(dev, 1);
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rtl8180_write_phy(dev, 0x11, 0x88);
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if (rtl818x_ioread8(priv, &priv->map->CONFIG2) &
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RTL818X_CONFIG2_ANTENNA_DIV)
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rtl8180_write_phy(dev, 0x12, 0xc0); /* enable ant diversity */
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else
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rtl8180_write_phy(dev, 0x12, 0x40); /* disable ant diversity */
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rtl8180_write_phy(dev, 0x13, 0x90 | priv->csthreshold);
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rtl8180_write_phy(dev, 0x19, 0x0);
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rtl8180_write_phy(dev, 0x1a, 0xa0);
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rtl8180_write_phy(dev, 0x1b, 0x44);
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}
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const struct rtl818x_rf_ops grf5101_rf_ops = {
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.name = "GCT",
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.init = grf5101_rf_init,
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.stop = grf5101_rf_stop,
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.set_chan = grf5101_rf_set_channel
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};
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