mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 02:16:42 +07:00
683b6c6f82
Pull irq code updates from Thomas Gleixner:
"The irq department proudly presents:
- Another tree wide sweep of irq infrastructure abuse. Clear winner
of the trainwreck engineering contest was:
#include "../../../kernel/irq/settings.h"
- Tree wide update of irq_set_affinity() callbacks which miss a cpu
online check when picking a single cpu out of the affinity mask.
- Tree wide consolidation of interrupt statistics.
- Updates to the threaded interrupt infrastructure to allow explicit
wakeup of the interrupt thread and a variant of synchronize_irq()
which synchronizes only the hard interrupt handler. Both are
needed to replace the homebrewn thread handling in the mmc/sdhci
code.
- New irq chip callbacks to allow proper support for GPIO based irqs.
The GPIO based interrupts need to request/release GPIO resources
from request/free_irq.
- A few new ARM interrupt chips. No revolutionary new hardware, just
differently wreckaged variations of the scheme.
- Small improvments, cleanups and updates all over the place"
I was hoping that that trainwreck engineering contest was a April Fools'
joke. But no.
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (68 commits)
irqchip: sun7i/sun6i: Disable NMI before registering the handler
ARM: sun7i/sun6i: dts: Fix IRQ number for sun6i NMI controller
ARM: sun7i/sun6i: irqchip: Update the documentation
ARM: sun7i/sun6i: dts: Add NMI irqchip support
ARM: sun7i/sun6i: irqchip: Add irqchip driver for NMI controller
genirq: Export symbol no_action()
arm: omap: Fix typo in ams-delta-fiq.c
m68k: atari: Fix the last kernel_stat.h fallout
irqchip: sun4i: Simplify sun4i_irq_ack
irqchip: sun4i: Use handle_fasteoi_irq for all interrupts
genirq: procfs: Make smp_affinity values go+r
softirq: Add linux/irq.h to make it compile again
m68k: amiga: Add linux/irq.h to make it compile again
irqchip: sun4i: Don't ack IRQs > 0, fix acking of IRQ 0
irqchip: sun4i: Fix a comment about mask register initialization
irqchip: sun4i: Fix irq 0 not working
genirq: Add a new IRQCHIP_EOI_THREADED flag
genirq: Document IRQCHIP_ONESHOT_SAFE flag
ARM: sunxi: dt: Convert to the new irq controller compatibles
irqchip: sunxi: Change compatibles
...
96 lines
2.0 KiB
C
96 lines
2.0 KiB
C
/*
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* Copyright (c) 1991,1992,1995 Linus Torvalds
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* Copyright (c) 1994 Alan Modra
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* Copyright (c) 1995 Markus Kuhn
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* Copyright (c) 1996 Ingo Molnar
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* Copyright (c) 1998 Andrea Arcangeli
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* Copyright (c) 2002,2006 Vojtech Pavlik
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* Copyright (c) 2003 Andi Kleen
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*
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*/
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/i8253.h>
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#include <linux/time.h>
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#include <linux/export.h>
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#include <asm/vsyscall.h>
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#include <asm/x86_init.h>
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#include <asm/i8259.h>
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#include <asm/timer.h>
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#include <asm/hpet.h>
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#include <asm/time.h>
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#ifdef CONFIG_X86_64
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__visible DEFINE_VVAR(volatile unsigned long, jiffies) = INITIAL_JIFFIES;
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#endif
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unsigned long profile_pc(struct pt_regs *regs)
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{
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unsigned long pc = instruction_pointer(regs);
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if (!user_mode_vm(regs) && in_lock_functions(pc)) {
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#ifdef CONFIG_FRAME_POINTER
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return *(unsigned long *)(regs->bp + sizeof(long));
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#else
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unsigned long *sp =
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(unsigned long *)kernel_stack_pointer(regs);
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/*
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* Return address is either directly at stack pointer
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* or above a saved flags. Eflags has bits 22-31 zero,
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* kernel addresses don't.
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*/
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if (sp[0] >> 22)
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return sp[0];
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if (sp[1] >> 22)
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return sp[1];
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#endif
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}
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return pc;
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}
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EXPORT_SYMBOL(profile_pc);
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/*
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* Default timer interrupt handler for PIT/HPET
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*/
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static irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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global_clock_event->event_handler(global_clock_event);
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return IRQ_HANDLED;
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}
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static struct irqaction irq0 = {
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.handler = timer_interrupt,
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.flags = IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
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.name = "timer"
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};
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void __init setup_default_timer_irq(void)
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{
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setup_irq(0, &irq0);
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}
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/* Default timer init function */
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void __init hpet_time_init(void)
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{
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if (!hpet_enable())
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setup_pit_timer();
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setup_default_timer_irq();
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}
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static __init void x86_late_time_init(void)
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{
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x86_init.timers.timer_init();
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tsc_init();
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}
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/*
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* Initialize TSC and delay the periodic timer init to
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* late x86_late_time_init() so ioremap works.
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*/
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void __init time_init(void)
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{
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late_time_init = x86_late_time_init;
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}
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