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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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046a48b35b
TLB entry should enable memory coherence in SMP. And like commit 631fba9dd3aca519355322cef035730609e91593, remove guard attribute to enable the prefetch of guest memory. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Avi Kivity <avi@redhat.com>
758 lines
19 KiB
C
758 lines
19 KiB
C
/*
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* Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Yu Liu, yu.liu@freescale.com
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*
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* Description:
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* This file is based on arch/powerpc/kvm/44x_tlb.c,
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* by Hollis Blanchard <hollisb@us.ibm.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/highmem.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_e500.h>
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#include "../mm/mmu_decl.h"
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#include "e500_tlb.h"
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#define to_htlb1_esel(esel) (tlb1_entry_num - (esel) - 1)
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static unsigned int tlb1_entry_num;
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void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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struct tlbe *tlbe;
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int i, tlbsel;
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printk("| %8s | %8s | %8s | %8s | %8s |\n",
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"nr", "mas1", "mas2", "mas3", "mas7");
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for (tlbsel = 0; tlbsel < 2; tlbsel++) {
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printk("Guest TLB%d:\n", tlbsel);
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for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++) {
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tlbe = &vcpu_e500->guest_tlb[tlbsel][i];
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if (tlbe->mas1 & MAS1_VALID)
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printk(" G[%d][%3d] | %08X | %08X | %08X | %08X |\n",
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tlbsel, i, tlbe->mas1, tlbe->mas2,
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tlbe->mas3, tlbe->mas7);
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}
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}
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for (tlbsel = 0; tlbsel < 2; tlbsel++) {
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printk("Shadow TLB%d:\n", tlbsel);
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for (i = 0; i < vcpu_e500->shadow_tlb_size[tlbsel]; i++) {
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tlbe = &vcpu_e500->shadow_tlb[tlbsel][i];
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if (tlbe->mas1 & MAS1_VALID)
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printk(" S[%d][%3d] | %08X | %08X | %08X | %08X |\n",
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tlbsel, i, tlbe->mas1, tlbe->mas2,
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tlbe->mas3, tlbe->mas7);
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}
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}
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}
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static inline unsigned int tlb0_get_next_victim(
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struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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unsigned int victim;
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victim = vcpu_e500->guest_tlb_nv[0]++;
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if (unlikely(vcpu_e500->guest_tlb_nv[0] >= KVM_E500_TLB0_WAY_NUM))
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vcpu_e500->guest_tlb_nv[0] = 0;
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return victim;
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}
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static inline unsigned int tlb1_max_shadow_size(void)
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{
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return tlb1_entry_num - tlbcam_index;
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}
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static inline int tlbe_is_writable(struct tlbe *tlbe)
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{
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return tlbe->mas3 & (MAS3_SW|MAS3_UW);
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}
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static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
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{
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/* Mask off reserved bits. */
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mas3 &= MAS3_ATTRIB_MASK;
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if (!usermode) {
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/* Guest is in supervisor mode,
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* so we need to translate guest
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* supervisor permissions into user permissions. */
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mas3 &= ~E500_TLB_USER_PERM_MASK;
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mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
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}
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return mas3 | E500_TLB_SUPER_PERM_MASK;
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}
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static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
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{
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#ifdef CONFIG_SMP
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return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
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#else
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return mas2 & MAS2_ATTRIB_MASK;
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#endif
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}
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/*
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* writing shadow tlb entry to host TLB
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*/
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static inline void __write_host_tlbe(struct tlbe *stlbe)
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{
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mtspr(SPRN_MAS1, stlbe->mas1);
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mtspr(SPRN_MAS2, stlbe->mas2);
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mtspr(SPRN_MAS3, stlbe->mas3);
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mtspr(SPRN_MAS7, stlbe->mas7);
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__asm__ __volatile__ ("tlbwe\n" : : );
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}
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static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
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int tlbsel, int esel)
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{
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struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
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local_irq_disable();
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if (tlbsel == 0) {
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__write_host_tlbe(stlbe);
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} else {
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unsigned register mas0;
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mas0 = mfspr(SPRN_MAS0);
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mtspr(SPRN_MAS0, MAS0_TLBSEL(1) | MAS0_ESEL(to_htlb1_esel(esel)));
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__write_host_tlbe(stlbe);
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mtspr(SPRN_MAS0, mas0);
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}
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local_irq_enable();
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}
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void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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int i;
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unsigned register mas0;
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/* Load all valid TLB1 entries to reduce guest tlb miss fault */
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local_irq_disable();
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mas0 = mfspr(SPRN_MAS0);
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for (i = 0; i < tlb1_max_shadow_size(); i++) {
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struct tlbe *stlbe = &vcpu_e500->shadow_tlb[1][i];
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if (get_tlb_v(stlbe)) {
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mtspr(SPRN_MAS0, MAS0_TLBSEL(1)
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| MAS0_ESEL(to_htlb1_esel(i)));
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__write_host_tlbe(stlbe);
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}
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}
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mtspr(SPRN_MAS0, mas0);
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local_irq_enable();
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}
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void kvmppc_e500_tlb_put(struct kvm_vcpu *vcpu)
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{
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_tlbil_all();
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}
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/* Search the guest TLB for a matching entry. */
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static int kvmppc_e500_tlb_index(struct kvmppc_vcpu_e500 *vcpu_e500,
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gva_t eaddr, int tlbsel, unsigned int pid, int as)
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{
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int i;
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/* XXX Replace loop with fancy data structures. */
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for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++) {
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struct tlbe *tlbe = &vcpu_e500->guest_tlb[tlbsel][i];
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unsigned int tid;
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if (eaddr < get_tlb_eaddr(tlbe))
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continue;
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if (eaddr > get_tlb_end(tlbe))
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continue;
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tid = get_tlb_tid(tlbe);
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if (tid && (tid != pid))
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continue;
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if (!get_tlb_v(tlbe))
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continue;
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if (get_tlb_ts(tlbe) != as && as != -1)
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continue;
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return i;
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}
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return -1;
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}
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static void kvmppc_e500_shadow_release(struct kvmppc_vcpu_e500 *vcpu_e500,
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int tlbsel, int esel)
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{
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struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
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struct page *page = vcpu_e500->shadow_pages[tlbsel][esel];
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if (page) {
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vcpu_e500->shadow_pages[tlbsel][esel] = NULL;
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if (get_tlb_v(stlbe)) {
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if (tlbe_is_writable(stlbe))
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kvm_release_page_dirty(page);
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else
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kvm_release_page_clean(page);
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}
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}
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}
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static void kvmppc_e500_stlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
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int tlbsel, int esel)
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{
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struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
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kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel);
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stlbe->mas1 = 0;
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KVMTRACE_5D(STLB_INVAL, &vcpu_e500->vcpu, index_of(tlbsel, esel),
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stlbe->mas1, stlbe->mas2, stlbe->mas3, stlbe->mas7,
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handler);
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}
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static void kvmppc_e500_tlb1_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
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gva_t eaddr, gva_t eend, u32 tid)
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{
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unsigned int pid = tid & 0xff;
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unsigned int i;
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/* XXX Replace loop with fancy data structures. */
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for (i = 0; i < vcpu_e500->guest_tlb_size[1]; i++) {
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struct tlbe *stlbe = &vcpu_e500->shadow_tlb[1][i];
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unsigned int tid;
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if (!get_tlb_v(stlbe))
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continue;
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if (eend < get_tlb_eaddr(stlbe))
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continue;
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if (eaddr > get_tlb_end(stlbe))
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continue;
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tid = get_tlb_tid(stlbe);
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if (tid && (tid != pid))
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continue;
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kvmppc_e500_stlbe_invalidate(vcpu_e500, 1, i);
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write_host_tlbe(vcpu_e500, 1, i);
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}
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}
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static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,
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unsigned int eaddr, int as)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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unsigned int victim, pidsel, tsized;
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int tlbsel;
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/* since we only have two TLBs, only lower bit is used. */
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tlbsel = (vcpu_e500->mas4 >> 28) & 0x1;
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victim = (tlbsel == 0) ? tlb0_get_next_victim(vcpu_e500) : 0;
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pidsel = (vcpu_e500->mas4 >> 16) & 0xf;
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tsized = (vcpu_e500->mas4 >> 8) & 0xf;
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vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
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| MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
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vcpu_e500->mas1 = MAS1_VALID | (as ? MAS1_TS : 0)
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| MAS1_TID(vcpu_e500->pid[pidsel])
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| MAS1_TSIZE(tsized);
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vcpu_e500->mas2 = (eaddr & MAS2_EPN)
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| (vcpu_e500->mas4 & MAS2_ATTRIB_MASK);
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vcpu_e500->mas3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
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vcpu_e500->mas6 = (vcpu_e500->mas6 & MAS6_SPID1)
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| (get_cur_pid(vcpu) << 16)
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| (as ? MAS6_SAS : 0);
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vcpu_e500->mas7 = 0;
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}
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static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
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u64 gvaddr, gfn_t gfn, struct tlbe *gtlbe, int tlbsel, int esel)
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{
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struct page *new_page;
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struct tlbe *stlbe;
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hpa_t hpaddr;
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stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
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/* Get reference to new page. */
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new_page = gfn_to_page(vcpu_e500->vcpu.kvm, gfn);
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if (is_error_page(new_page)) {
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printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
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kvm_release_page_clean(new_page);
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return;
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}
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hpaddr = page_to_phys(new_page);
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/* Drop reference to old page. */
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kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel);
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vcpu_e500->shadow_pages[tlbsel][esel] = new_page;
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/* Force TS=1 IPROT=0 TSIZE=4KB for all guest mappings. */
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stlbe->mas1 = MAS1_TSIZE(BOOKE_PAGESZ_4K)
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| MAS1_TID(get_tlb_tid(gtlbe)) | MAS1_TS | MAS1_VALID;
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stlbe->mas2 = (gvaddr & MAS2_EPN)
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| e500_shadow_mas2_attrib(gtlbe->mas2,
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vcpu_e500->vcpu.arch.msr & MSR_PR);
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stlbe->mas3 = (hpaddr & MAS3_RPN)
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| e500_shadow_mas3_attrib(gtlbe->mas3,
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vcpu_e500->vcpu.arch.msr & MSR_PR);
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stlbe->mas7 = (hpaddr >> 32) & MAS7_RPN;
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KVMTRACE_5D(STLB_WRITE, &vcpu_e500->vcpu, index_of(tlbsel, esel),
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stlbe->mas1, stlbe->mas2, stlbe->mas3, stlbe->mas7,
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handler);
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}
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/* XXX only map the one-one case, for now use TLB0 */
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static int kvmppc_e500_stlbe_map(struct kvmppc_vcpu_e500 *vcpu_e500,
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int tlbsel, int esel)
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{
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struct tlbe *gtlbe;
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gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
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kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
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get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
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gtlbe, tlbsel, esel);
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return esel;
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}
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/* Caller must ensure that the specified guest TLB entry is safe to insert into
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* the shadow TLB. */
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/* XXX for both one-one and one-to-many , for now use TLB1 */
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static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
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u64 gvaddr, gfn_t gfn, struct tlbe *gtlbe)
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{
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unsigned int victim;
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victim = vcpu_e500->guest_tlb_nv[1]++;
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if (unlikely(vcpu_e500->guest_tlb_nv[1] >= tlb1_max_shadow_size()))
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vcpu_e500->guest_tlb_nv[1] = 0;
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kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, victim);
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return victim;
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}
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/* Invalidate all guest kernel mappings when enter usermode,
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* so that when they fault back in they will get the
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* proper permission bits. */
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void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
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{
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if (usermode) {
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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int i;
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/* XXX Replace loop with fancy data structures. */
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for (i = 0; i < tlb1_max_shadow_size(); i++)
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kvmppc_e500_stlbe_invalidate(vcpu_e500, 1, i);
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_tlbil_all();
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}
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}
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static int kvmppc_e500_gtlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
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int tlbsel, int esel)
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{
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struct tlbe *gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
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if (unlikely(get_tlb_iprot(gtlbe)))
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return -1;
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if (tlbsel == 1) {
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kvmppc_e500_tlb1_invalidate(vcpu_e500, get_tlb_eaddr(gtlbe),
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get_tlb_end(gtlbe),
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get_tlb_tid(gtlbe));
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} else {
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kvmppc_e500_stlbe_invalidate(vcpu_e500, tlbsel, esel);
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}
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gtlbe->mas1 = 0;
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return 0;
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}
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int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500, ulong value)
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{
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int esel;
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if (value & MMUCSR0_TLB0FI)
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for (esel = 0; esel < vcpu_e500->guest_tlb_size[0]; esel++)
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kvmppc_e500_gtlbe_invalidate(vcpu_e500, 0, esel);
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if (value & MMUCSR0_TLB1FI)
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for (esel = 0; esel < vcpu_e500->guest_tlb_size[1]; esel++)
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kvmppc_e500_gtlbe_invalidate(vcpu_e500, 1, esel);
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_tlbil_all();
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return EMULATE_DONE;
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}
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int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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unsigned int ia;
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int esel, tlbsel;
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gva_t ea;
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ea = ((ra) ? vcpu->arch.gpr[ra] : 0) + vcpu->arch.gpr[rb];
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ia = (ea >> 2) & 0x1;
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/* since we only have two TLBs, only lower bit is used. */
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tlbsel = (ea >> 3) & 0x1;
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if (ia) {
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/* invalidate all entries */
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for (esel = 0; esel < vcpu_e500->guest_tlb_size[tlbsel]; esel++)
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kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
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} else {
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ea &= 0xfffff000;
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esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel,
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get_cur_pid(vcpu), -1);
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if (esel >= 0)
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kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
|
|
}
|
|
|
|
_tlbil_all();
|
|
|
|
return EMULATE_DONE;
|
|
}
|
|
|
|
int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
int tlbsel, esel;
|
|
struct tlbe *gtlbe;
|
|
|
|
tlbsel = get_tlb_tlbsel(vcpu_e500);
|
|
esel = get_tlb_esel(vcpu_e500, tlbsel);
|
|
|
|
gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
|
|
vcpu_e500->mas0 &= ~MAS0_NV(~0);
|
|
vcpu_e500->mas0 |= MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
|
|
vcpu_e500->mas1 = gtlbe->mas1;
|
|
vcpu_e500->mas2 = gtlbe->mas2;
|
|
vcpu_e500->mas3 = gtlbe->mas3;
|
|
vcpu_e500->mas7 = gtlbe->mas7;
|
|
|
|
return EMULATE_DONE;
|
|
}
|
|
|
|
int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
int as = !!get_cur_sas(vcpu_e500);
|
|
unsigned int pid = get_cur_spid(vcpu_e500);
|
|
int esel, tlbsel;
|
|
struct tlbe *gtlbe = NULL;
|
|
gva_t ea;
|
|
|
|
ea = vcpu->arch.gpr[rb];
|
|
|
|
for (tlbsel = 0; tlbsel < 2; tlbsel++) {
|
|
esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as);
|
|
if (esel >= 0) {
|
|
gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (gtlbe) {
|
|
vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel)
|
|
| MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
|
|
vcpu_e500->mas1 = gtlbe->mas1;
|
|
vcpu_e500->mas2 = gtlbe->mas2;
|
|
vcpu_e500->mas3 = gtlbe->mas3;
|
|
vcpu_e500->mas7 = gtlbe->mas7;
|
|
} else {
|
|
int victim;
|
|
|
|
/* since we only have two TLBs, only lower bit is used. */
|
|
tlbsel = vcpu_e500->mas4 >> 28 & 0x1;
|
|
victim = (tlbsel == 0) ? tlb0_get_next_victim(vcpu_e500) : 0;
|
|
|
|
vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
|
|
| MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
|
|
vcpu_e500->mas1 = (vcpu_e500->mas6 & MAS6_SPID0)
|
|
| (vcpu_e500->mas6 & (MAS6_SAS ? MAS1_TS : 0))
|
|
| (vcpu_e500->mas4 & MAS4_TSIZED(~0));
|
|
vcpu_e500->mas2 &= MAS2_EPN;
|
|
vcpu_e500->mas2 |= vcpu_e500->mas4 & MAS2_ATTRIB_MASK;
|
|
vcpu_e500->mas3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
|
|
vcpu_e500->mas7 = 0;
|
|
}
|
|
|
|
return EMULATE_DONE;
|
|
}
|
|
|
|
int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
u64 eaddr;
|
|
u64 raddr;
|
|
u32 tid;
|
|
struct tlbe *gtlbe;
|
|
int tlbsel, esel, stlbsel, sesel;
|
|
|
|
tlbsel = get_tlb_tlbsel(vcpu_e500);
|
|
esel = get_tlb_esel(vcpu_e500, tlbsel);
|
|
|
|
gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
|
|
|
|
if (get_tlb_v(gtlbe) && tlbsel == 1) {
|
|
eaddr = get_tlb_eaddr(gtlbe);
|
|
tid = get_tlb_tid(gtlbe);
|
|
kvmppc_e500_tlb1_invalidate(vcpu_e500, eaddr,
|
|
get_tlb_end(gtlbe), tid);
|
|
}
|
|
|
|
gtlbe->mas1 = vcpu_e500->mas1;
|
|
gtlbe->mas2 = vcpu_e500->mas2;
|
|
gtlbe->mas3 = vcpu_e500->mas3;
|
|
gtlbe->mas7 = vcpu_e500->mas7;
|
|
|
|
KVMTRACE_5D(GTLB_WRITE, vcpu, vcpu_e500->mas0,
|
|
gtlbe->mas1, gtlbe->mas2, gtlbe->mas3, gtlbe->mas7,
|
|
handler);
|
|
|
|
/* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
|
|
if (tlbe_is_host_safe(vcpu, gtlbe)) {
|
|
switch (tlbsel) {
|
|
case 0:
|
|
/* TLB0 */
|
|
gtlbe->mas1 &= ~MAS1_TSIZE(~0);
|
|
gtlbe->mas1 |= MAS1_TSIZE(BOOKE_PAGESZ_4K);
|
|
|
|
stlbsel = 0;
|
|
sesel = kvmppc_e500_stlbe_map(vcpu_e500, 0, esel);
|
|
|
|
break;
|
|
|
|
case 1:
|
|
/* TLB1 */
|
|
eaddr = get_tlb_eaddr(gtlbe);
|
|
raddr = get_tlb_raddr(gtlbe);
|
|
|
|
/* Create a 4KB mapping on the host.
|
|
* If the guest wanted a large page,
|
|
* only the first 4KB is mapped here and the rest
|
|
* are mapped on the fly. */
|
|
stlbsel = 1;
|
|
sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr,
|
|
raddr >> PAGE_SHIFT, gtlbe);
|
|
break;
|
|
|
|
default:
|
|
BUG();
|
|
}
|
|
write_host_tlbe(vcpu_e500, stlbsel, sesel);
|
|
}
|
|
|
|
return EMULATE_DONE;
|
|
}
|
|
|
|
int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
|
|
{
|
|
unsigned int as = !!(vcpu->arch.msr & MSR_IS);
|
|
|
|
return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
|
|
}
|
|
|
|
int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
|
|
{
|
|
unsigned int as = !!(vcpu->arch.msr & MSR_DS);
|
|
|
|
return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
|
|
}
|
|
|
|
void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
|
|
{
|
|
unsigned int as = !!(vcpu->arch.msr & MSR_IS);
|
|
|
|
kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.pc, as);
|
|
}
|
|
|
|
void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
|
|
{
|
|
unsigned int as = !!(vcpu->arch.msr & MSR_DS);
|
|
|
|
kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.fault_dear, as);
|
|
}
|
|
|
|
gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int index,
|
|
gva_t eaddr)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
struct tlbe *gtlbe =
|
|
&vcpu_e500->guest_tlb[tlbsel_of(index)][esel_of(index)];
|
|
u64 pgmask = get_tlb_bytes(gtlbe) - 1;
|
|
|
|
return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
|
|
}
|
|
|
|
void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
int tlbsel, i;
|
|
|
|
for (tlbsel = 0; tlbsel < 2; tlbsel++)
|
|
for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++)
|
|
kvmppc_e500_shadow_release(vcpu_e500, tlbsel, i);
|
|
|
|
/* discard all guest mapping */
|
|
_tlbil_all();
|
|
}
|
|
|
|
void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
|
|
unsigned int index)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
int tlbsel = tlbsel_of(index);
|
|
int esel = esel_of(index);
|
|
int stlbsel, sesel;
|
|
|
|
switch (tlbsel) {
|
|
case 0:
|
|
stlbsel = 0;
|
|
sesel = esel;
|
|
break;
|
|
|
|
case 1: {
|
|
gfn_t gfn = gpaddr >> PAGE_SHIFT;
|
|
struct tlbe *gtlbe
|
|
= &vcpu_e500->guest_tlb[tlbsel][esel];
|
|
|
|
stlbsel = 1;
|
|
sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn, gtlbe);
|
|
break;
|
|
}
|
|
|
|
default:
|
|
BUG();
|
|
break;
|
|
}
|
|
write_host_tlbe(vcpu_e500, stlbsel, sesel);
|
|
}
|
|
|
|
int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
|
|
gva_t eaddr, unsigned int pid, int as)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
int esel, tlbsel;
|
|
|
|
for (tlbsel = 0; tlbsel < 2; tlbsel++) {
|
|
esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as);
|
|
if (esel >= 0)
|
|
return index_of(tlbsel, esel);
|
|
}
|
|
|
|
return -1;
|
|
}
|
|
|
|
void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)
|
|
{
|
|
struct tlbe *tlbe;
|
|
|
|
/* Insert large initial mapping for guest. */
|
|
tlbe = &vcpu_e500->guest_tlb[1][0];
|
|
tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOKE_PAGESZ_256M);
|
|
tlbe->mas2 = 0;
|
|
tlbe->mas3 = E500_TLB_SUPER_PERM_MASK;
|
|
tlbe->mas7 = 0;
|
|
|
|
/* 4K map for serial output. Used by kernel wrapper. */
|
|
tlbe = &vcpu_e500->guest_tlb[1][1];
|
|
tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOKE_PAGESZ_4K);
|
|
tlbe->mas2 = (0xe0004500 & 0xFFFFF000) | MAS2_I | MAS2_G;
|
|
tlbe->mas3 = (0xe0004500 & 0xFFFFF000) | E500_TLB_SUPER_PERM_MASK;
|
|
tlbe->mas7 = 0;
|
|
}
|
|
|
|
int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
|
|
{
|
|
tlb1_entry_num = mfspr(SPRN_TLB1CFG) & 0xFFF;
|
|
|
|
vcpu_e500->guest_tlb_size[0] = KVM_E500_TLB0_SIZE;
|
|
vcpu_e500->guest_tlb[0] =
|
|
kzalloc(sizeof(struct tlbe) * KVM_E500_TLB0_SIZE, GFP_KERNEL);
|
|
if (vcpu_e500->guest_tlb[0] == NULL)
|
|
goto err_out;
|
|
|
|
vcpu_e500->shadow_tlb_size[0] = KVM_E500_TLB0_SIZE;
|
|
vcpu_e500->shadow_tlb[0] =
|
|
kzalloc(sizeof(struct tlbe) * KVM_E500_TLB0_SIZE, GFP_KERNEL);
|
|
if (vcpu_e500->shadow_tlb[0] == NULL)
|
|
goto err_out_guest0;
|
|
|
|
vcpu_e500->guest_tlb_size[1] = KVM_E500_TLB1_SIZE;
|
|
vcpu_e500->guest_tlb[1] =
|
|
kzalloc(sizeof(struct tlbe) * KVM_E500_TLB1_SIZE, GFP_KERNEL);
|
|
if (vcpu_e500->guest_tlb[1] == NULL)
|
|
goto err_out_shadow0;
|
|
|
|
vcpu_e500->shadow_tlb_size[1] = tlb1_entry_num;
|
|
vcpu_e500->shadow_tlb[1] =
|
|
kzalloc(sizeof(struct tlbe) * tlb1_entry_num, GFP_KERNEL);
|
|
if (vcpu_e500->shadow_tlb[1] == NULL)
|
|
goto err_out_guest1;
|
|
|
|
vcpu_e500->shadow_pages[0] = (struct page **)
|
|
kzalloc(sizeof(struct page *) * KVM_E500_TLB0_SIZE, GFP_KERNEL);
|
|
if (vcpu_e500->shadow_pages[0] == NULL)
|
|
goto err_out_shadow1;
|
|
|
|
vcpu_e500->shadow_pages[1] = (struct page **)
|
|
kzalloc(sizeof(struct page *) * tlb1_entry_num, GFP_KERNEL);
|
|
if (vcpu_e500->shadow_pages[1] == NULL)
|
|
goto err_out_page0;
|
|
|
|
return 0;
|
|
|
|
err_out_page0:
|
|
kfree(vcpu_e500->shadow_pages[0]);
|
|
err_out_shadow1:
|
|
kfree(vcpu_e500->shadow_tlb[1]);
|
|
err_out_guest1:
|
|
kfree(vcpu_e500->guest_tlb[1]);
|
|
err_out_shadow0:
|
|
kfree(vcpu_e500->shadow_tlb[0]);
|
|
err_out_guest0:
|
|
kfree(vcpu_e500->guest_tlb[0]);
|
|
err_out:
|
|
return -1;
|
|
}
|
|
|
|
void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
|
|
{
|
|
kfree(vcpu_e500->shadow_pages[1]);
|
|
kfree(vcpu_e500->shadow_pages[0]);
|
|
kfree(vcpu_e500->shadow_tlb[1]);
|
|
kfree(vcpu_e500->guest_tlb[1]);
|
|
kfree(vcpu_e500->shadow_tlb[0]);
|
|
kfree(vcpu_e500->guest_tlb[0]);
|
|
}
|