AuxXxilium/linux_dsm_epyc7002
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7549cdf59d
linux_dsm_epyc7002/arch/riscv/include/asm
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Christoph Hellwig 7549cdf59d
riscv: rename sptbr to satp 
satp is the name used by the current privileged spec 1.10, use it
instead of the old name.  The most recent release binutils release
(2.29) doesn't know about the satp name yet, so stick to the name from
the previous privileged ISA release and comment on the fact.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-01-30 19:16:12 -08:00
..
asm-offsets.h RISC-V: Task implementation 2017-09-26 15:26:46 -07:00
asm.h RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros 2017-11-30 10:01:10 -08:00
atomic.h RISC-V: Comment on why {,cmp}xchg is ordered how it is 2017-11-28 14:03:29 -08:00
barrier.h RISC-V: Resurrect smp_mb__after_spinlock() 2017-12-11 07:51:07 -08:00
bitops.h RISC-V: __test_and_op_bit_ord should be strongly ordered 2017-11-28 14:04:05 -08:00
bug.h RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros 2017-11-30 10:01:10 -08:00
cache.h
cacheflush.h RISC-V: Allow userspace to flush the instruction cache 2017-11-30 12:58:29 -08:00
cmpxchg.h
compat.h RISC-V: ELF and module implementation 2017-09-26 15:26:46 -07:00
csr.h riscv: rename sptbr to satp 2018-01-30 19:16:12 -08:00
current.h RISC-V: Task implementation 2017-09-26 15:26:46 -07:00
delay.h RISC-V: Device, timer, IRQs, and the SBI 2017-09-26 15:26:47 -07:00
dma-mapping.h RISC-V: Device, timer, IRQs, and the SBI 2017-09-26 15:26:47 -07:00
elf.h RISC-V: ELF and module implementation 2017-09-26 15:26:46 -07:00
ftrace.h riscv/ftrace: Add basic support 2018-01-30 19:10:54 -08:00
hwcap.h RISC-V: ELF and module implementation 2017-09-26 15:26:46 -07:00
io.h riscv: remove CONFIG_MMU ifdefs 2018-01-07 15:14:39 -08:00
irq.h RISC-V: Device, timer, IRQs, and the SBI 2017-09-26 15:26:47 -07:00
irqflags.h riscv: rename SR_* constants to match the spec 2018-01-07 15:14:39 -08:00
Kbuild riscv/ftrace: Add basic support 2018-01-30 19:10:54 -08:00
kprobes.h RISC-V: Task implementation 2017-09-26 15:26:46 -07:00
linkage.h RISC-V: Generic library routines and assembly 2017-09-26 15:26:45 -07:00
mmu_context.h riscv: rename sptbr to satp 2018-01-30 19:16:12 -08:00
mmu.h RISC-V: Flush I$ when making a dirty page executable 2017-11-30 12:58:25 -08:00
page.h RISC-V: Paging and MMU 2017-09-26 15:26:47 -07:00
pci.h RISC-V: Device, timer, IRQs, and the SBI 2017-09-26 15:26:47 -07:00
pgalloc.h RISC-V: Paging and MMU 2017-09-26 15:26:47 -07:00
pgtable-32.h RISC-V: Paging and MMU 2017-09-26 15:26:47 -07:00
pgtable-64.h RISC-V: Paging and MMU 2017-09-26 15:26:47 -07:00
pgtable-bits.h RISC-V: Paging and MMU 2017-09-26 15:26:47 -07:00
pgtable.h riscv: remove CONFIG_MMU ifdefs 2018-01-07 15:14:39 -08:00
processor.h RISC-V: Task implementation 2017-09-26 15:26:46 -07:00
ptrace.h riscv: rename SR_* constants to match the spec 2018-01-07 15:14:39 -08:00
sbi.h RISC-V: Device, timer, IRQs, and the SBI 2017-09-26 15:26:47 -07:00
smp.h
spinlock_types.h
spinlock.h RISC-V: remove spin_unlock_wait() 2017-11-28 14:06:31 -08:00
string.h RISC-V: Generic library routines and assembly 2017-09-26 15:26:45 -07:00
switch_to.h RISC-V: Task implementation 2017-09-26 15:26:46 -07:00
syscall.h RISC-V: User-facing API 2017-09-26 15:26:48 -07:00
thread_info.h RISC-V: Task implementation 2017-09-26 15:26:46 -07:00
timex.h RISC-V: Use define for get_cycles like other architectures 2017-11-30 10:12:21 -08:00
tlb.h
tlbflush.h RISC-V: Limit the scope of TLB shootdowns 2018-01-30 19:13:33 -08:00
uaccess.h riscv: remove CONFIG_MMU ifdefs 2018-01-07 15:14:39 -08:00
unistd.h riscv: remove unused __ARCH_HAVE_MMU define 2018-01-30 19:11:43 -08:00
vdso.h RISC-V: Allow userspace to flush the instruction cache 2017-11-30 12:58:29 -08:00
word-at-a-time.h RISC-V: Generic library routines and assembly 2017-09-26 15:26:45 -07:00