mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 02:25:02 +07:00
931f27c6e8
For the snd_soc_cache_init(), the reg_size maybe zero and then the value of codec->reg_cache, which is alloced via kzalloc, maybe equal to ZERO_SIZE_PTR. If the reg parameter of snd_soc_cache_write() is large enough, the cache[idx] = val maybe cause the kernel crash... So this patch fix this via doing the zero pionter check of it. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
203 lines
4.6 KiB
C
203 lines
4.6 KiB
C
/*
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* soc-cache.c -- ASoC register cache helpers
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*
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* Copyright 2009 Wolfson Microelectronics PLC.
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <sound/soc.h>
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#include <linux/export.h>
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#include <linux/slab.h>
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#include <trace/events/asoc.h>
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static bool snd_soc_set_cache_val(void *base, unsigned int idx,
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unsigned int val, unsigned int word_size)
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{
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switch (word_size) {
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case 1: {
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u8 *cache = base;
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if (cache[idx] == val)
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return true;
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cache[idx] = val;
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break;
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}
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case 2: {
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u16 *cache = base;
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if (cache[idx] == val)
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return true;
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cache[idx] = val;
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break;
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}
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default:
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WARN(1, "Invalid word_size %d\n", word_size);
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break;
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}
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return false;
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}
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static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
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unsigned int word_size)
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{
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if (!base)
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return -1;
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switch (word_size) {
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case 1: {
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const u8 *cache = base;
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return cache[idx];
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}
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case 2: {
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const u16 *cache = base;
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return cache[idx];
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}
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default:
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WARN(1, "Invalid word_size %d\n", word_size);
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break;
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}
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/* unreachable */
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return -1;
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}
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int snd_soc_cache_init(struct snd_soc_codec *codec)
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{
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const struct snd_soc_codec_driver *codec_drv = codec->driver;
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size_t reg_size;
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reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
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mutex_init(&codec->cache_rw_mutex);
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dev_dbg(codec->dev, "ASoC: Initializing cache for %s codec\n",
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codec->name);
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if (codec_drv->reg_cache_default)
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codec->reg_cache = kmemdup(codec_drv->reg_cache_default,
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reg_size, GFP_KERNEL);
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else
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codec->reg_cache = kzalloc(reg_size, GFP_KERNEL);
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if (!codec->reg_cache)
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return -ENOMEM;
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return 0;
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}
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/*
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* NOTE: keep in mind that this function might be called
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* multiple times.
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*/
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int snd_soc_cache_exit(struct snd_soc_codec *codec)
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{
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dev_dbg(codec->dev, "ASoC: Destroying cache for %s codec\n",
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codec->name);
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kfree(codec->reg_cache);
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codec->reg_cache = NULL;
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return 0;
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}
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/**
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* snd_soc_cache_read: Fetch the value of a given register from the cache.
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*
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* @codec: CODEC to configure.
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* @reg: The register index.
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* @value: The value to be returned.
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*/
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int snd_soc_cache_read(struct snd_soc_codec *codec,
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unsigned int reg, unsigned int *value)
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{
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if (!value)
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return -EINVAL;
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mutex_lock(&codec->cache_rw_mutex);
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if (!ZERO_OR_NULL_PTR(codec->reg_cache))
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*value = snd_soc_get_cache_val(codec->reg_cache, reg,
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codec->driver->reg_word_size);
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mutex_unlock(&codec->cache_rw_mutex);
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return 0;
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}
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EXPORT_SYMBOL_GPL(snd_soc_cache_read);
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/**
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* snd_soc_cache_write: Set the value of a given register in the cache.
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*
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* @codec: CODEC to configure.
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* @reg: The register index.
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* @value: The new register value.
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*/
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int snd_soc_cache_write(struct snd_soc_codec *codec,
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unsigned int reg, unsigned int value)
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{
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mutex_lock(&codec->cache_rw_mutex);
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if (!ZERO_OR_NULL_PTR(codec->reg_cache))
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snd_soc_set_cache_val(codec->reg_cache, reg, value,
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codec->driver->reg_word_size);
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mutex_unlock(&codec->cache_rw_mutex);
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return 0;
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}
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EXPORT_SYMBOL_GPL(snd_soc_cache_write);
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static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
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{
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int i;
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int ret;
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const struct snd_soc_codec_driver *codec_drv;
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unsigned int val;
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codec_drv = codec->driver;
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for (i = 0; i < codec_drv->reg_cache_size; ++i) {
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ret = snd_soc_cache_read(codec, i, &val);
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if (ret)
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return ret;
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if (codec_drv->reg_cache_default)
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if (snd_soc_get_cache_val(codec_drv->reg_cache_default,
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i, codec_drv->reg_word_size) == val)
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continue;
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WARN_ON(!snd_soc_codec_writable_register(codec, i));
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ret = snd_soc_write(codec, i, val);
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if (ret)
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return ret;
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dev_dbg(codec->dev, "ASoC: Synced register %#x, value = %#x\n",
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i, val);
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}
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return 0;
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}
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/**
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* snd_soc_cache_sync: Sync the register cache with the hardware.
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*
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* @codec: CODEC to configure.
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*
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* Any registers that should not be synced should be marked as
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* volatile. In general drivers can choose not to use the provided
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* syncing functionality if they so require.
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*/
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int snd_soc_cache_sync(struct snd_soc_codec *codec)
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{
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const char *name = "flat";
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int ret;
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if (!codec->cache_sync)
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return 0;
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dev_dbg(codec->dev, "ASoC: Syncing cache for %s codec\n",
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codec->name);
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trace_snd_soc_cache_sync(codec, name, "start");
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ret = snd_soc_flat_cache_sync(codec);
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if (!ret)
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codec->cache_sync = 0;
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trace_snd_soc_cache_sync(codec, name, "end");
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return ret;
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}
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EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
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