mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 00:10:10 +07:00
e47685ec4c
[ Upstream commit 72d6b2459dbd539c1369149e501fdc3dc8ddef16 ]
If state->duty_cycle is 0x100000000000000, the previous calculation of
duty_scale overflows and yields a duty cycle ratio of 0% instead of
100%. Fix this by clamping the requested duty cycle to the maximal
possible duty cycle first. This way it is possible to use a native
integer division instead of a (depending on the architecture) more
expensive 64bit division.
With this change in place duty_scale cannot be bigger than 256 which
allows to simplify the calculation of duty_val.
Fixes: 6f0841a819
("pwm: Add support for Azoteq IQS620A PWM generator")
Tested-by: Jeff LaBundy <jeff@labundy.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
274 lines
7.1 KiB
C
274 lines
7.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Azoteq IQS620A PWM Generator
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*
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* Copyright (C) 2019 Jeff LaBundy <jeff@labundy.com>
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*
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* Limitations:
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* - The period is fixed to 1 ms and is generated continuously despite changes
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* to the duty cycle or enable/disable state.
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* - Changes to the duty cycle or enable/disable state take effect immediately
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* and may result in a glitch during the period in which the change is made.
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* - The device cannot generate a 0% duty cycle. For duty cycles below 1 / 256
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* ms, the output is disabled and relies upon an external pull-down resistor
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* to hold the GPIO3/LTX pin low.
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/mfd/iqs62x.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/notifier.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#define IQS620_PWR_SETTINGS 0xd2
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#define IQS620_PWR_SETTINGS_PWM_OUT BIT(7)
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#define IQS620_PWM_DUTY_CYCLE 0xd8
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#define IQS620_PWM_PERIOD_NS 1000000
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struct iqs620_pwm_private {
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struct iqs62x_core *iqs62x;
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struct pwm_chip chip;
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struct notifier_block notifier;
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struct mutex lock;
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bool out_en;
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u8 duty_val;
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};
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static int iqs620_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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const struct pwm_state *state)
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{
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struct iqs620_pwm_private *iqs620_pwm;
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struct iqs62x_core *iqs62x;
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unsigned int duty_cycle;
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unsigned int duty_scale;
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int ret;
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if (state->polarity != PWM_POLARITY_NORMAL)
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return -ENOTSUPP;
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if (state->period < IQS620_PWM_PERIOD_NS)
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return -EINVAL;
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iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip);
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iqs62x = iqs620_pwm->iqs62x;
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/*
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* The duty cycle generated by the device is calculated as follows:
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*
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* duty_cycle = (IQS620_PWM_DUTY_CYCLE + 1) / 256 * 1 ms
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*
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* ...where IQS620_PWM_DUTY_CYCLE is a register value between 0 and 255
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* (inclusive). Therefore the lowest duty cycle the device can generate
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* while the output is enabled is 1 / 256 ms.
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*
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* For lower duty cycles (e.g. 0), the PWM output is simply disabled to
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* allow an external pull-down resistor to hold the GPIO3/LTX pin low.
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*/
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duty_cycle = min_t(u64, state->duty_cycle, IQS620_PWM_PERIOD_NS);
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duty_scale = duty_cycle * 256 / IQS620_PWM_PERIOD_NS;
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mutex_lock(&iqs620_pwm->lock);
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if (!state->enabled || !duty_scale) {
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ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
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IQS620_PWR_SETTINGS_PWM_OUT, 0);
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if (ret)
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goto err_mutex;
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}
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if (duty_scale) {
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u8 duty_val = duty_scale - 1;
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ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE,
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duty_val);
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if (ret)
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goto err_mutex;
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iqs620_pwm->duty_val = duty_val;
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}
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if (state->enabled && duty_scale) {
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ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
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IQS620_PWR_SETTINGS_PWM_OUT, 0xff);
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if (ret)
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goto err_mutex;
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}
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iqs620_pwm->out_en = state->enabled;
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err_mutex:
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mutex_unlock(&iqs620_pwm->lock);
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return ret;
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}
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static void iqs620_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
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struct pwm_state *state)
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{
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struct iqs620_pwm_private *iqs620_pwm;
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iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip);
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mutex_lock(&iqs620_pwm->lock);
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/*
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* Since the device cannot generate a 0% duty cycle, requests to do so
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* cause subsequent calls to iqs620_pwm_get_state to report the output
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* as disabled with duty cycle equal to that which was in use prior to
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* the request. This is not ideal, but is the best compromise based on
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* the capabilities of the device.
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*/
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state->enabled = iqs620_pwm->out_en;
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state->duty_cycle = DIV_ROUND_UP((iqs620_pwm->duty_val + 1) *
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IQS620_PWM_PERIOD_NS, 256);
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mutex_unlock(&iqs620_pwm->lock);
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state->period = IQS620_PWM_PERIOD_NS;
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}
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static int iqs620_pwm_notifier(struct notifier_block *notifier,
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unsigned long event_flags, void *context)
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{
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struct iqs620_pwm_private *iqs620_pwm;
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struct iqs62x_core *iqs62x;
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int ret;
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if (!(event_flags & BIT(IQS62X_EVENT_SYS_RESET)))
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return NOTIFY_DONE;
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iqs620_pwm = container_of(notifier, struct iqs620_pwm_private,
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notifier);
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iqs62x = iqs620_pwm->iqs62x;
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mutex_lock(&iqs620_pwm->lock);
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/*
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* The parent MFD driver already prints an error message in the event
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* of a device reset, so nothing else is printed here unless there is
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* an additional failure.
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*/
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ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE,
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iqs620_pwm->duty_val);
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if (ret)
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goto err_mutex;
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ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,
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IQS620_PWR_SETTINGS_PWM_OUT,
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iqs620_pwm->out_en ? 0xff : 0);
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err_mutex:
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mutex_unlock(&iqs620_pwm->lock);
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if (ret) {
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dev_err(iqs620_pwm->chip.dev,
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"Failed to re-initialize device: %d\n", ret);
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return NOTIFY_BAD;
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}
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return NOTIFY_OK;
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}
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static const struct pwm_ops iqs620_pwm_ops = {
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.apply = iqs620_pwm_apply,
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.get_state = iqs620_pwm_get_state,
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.owner = THIS_MODULE,
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};
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static void iqs620_pwm_notifier_unregister(void *context)
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{
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struct iqs620_pwm_private *iqs620_pwm = context;
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int ret;
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ret = blocking_notifier_chain_unregister(&iqs620_pwm->iqs62x->nh,
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&iqs620_pwm->notifier);
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if (ret)
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dev_err(iqs620_pwm->chip.dev,
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"Failed to unregister notifier: %d\n", ret);
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}
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static int iqs620_pwm_probe(struct platform_device *pdev)
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{
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struct iqs62x_core *iqs62x = dev_get_drvdata(pdev->dev.parent);
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struct iqs620_pwm_private *iqs620_pwm;
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unsigned int val;
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int ret;
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iqs620_pwm = devm_kzalloc(&pdev->dev, sizeof(*iqs620_pwm), GFP_KERNEL);
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if (!iqs620_pwm)
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return -ENOMEM;
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platform_set_drvdata(pdev, iqs620_pwm);
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iqs620_pwm->iqs62x = iqs62x;
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ret = regmap_read(iqs62x->regmap, IQS620_PWR_SETTINGS, &val);
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if (ret)
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return ret;
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iqs620_pwm->out_en = val & IQS620_PWR_SETTINGS_PWM_OUT;
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ret = regmap_read(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE, &val);
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if (ret)
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return ret;
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iqs620_pwm->duty_val = val;
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iqs620_pwm->chip.dev = &pdev->dev;
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iqs620_pwm->chip.ops = &iqs620_pwm_ops;
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iqs620_pwm->chip.base = -1;
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iqs620_pwm->chip.npwm = 1;
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mutex_init(&iqs620_pwm->lock);
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iqs620_pwm->notifier.notifier_call = iqs620_pwm_notifier;
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ret = blocking_notifier_chain_register(&iqs620_pwm->iqs62x->nh,
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&iqs620_pwm->notifier);
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if (ret) {
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dev_err(&pdev->dev, "Failed to register notifier: %d\n", ret);
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return ret;
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}
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ret = devm_add_action_or_reset(&pdev->dev,
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iqs620_pwm_notifier_unregister,
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iqs620_pwm);
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if (ret)
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return ret;
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ret = pwmchip_add(&iqs620_pwm->chip);
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if (ret)
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dev_err(&pdev->dev, "Failed to add device: %d\n", ret);
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return ret;
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}
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static int iqs620_pwm_remove(struct platform_device *pdev)
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{
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struct iqs620_pwm_private *iqs620_pwm = platform_get_drvdata(pdev);
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int ret;
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ret = pwmchip_remove(&iqs620_pwm->chip);
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if (ret)
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dev_err(&pdev->dev, "Failed to remove device: %d\n", ret);
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return ret;
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}
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static struct platform_driver iqs620_pwm_platform_driver = {
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.driver = {
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.name = "iqs620a-pwm",
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},
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.probe = iqs620_pwm_probe,
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.remove = iqs620_pwm_remove,
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};
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module_platform_driver(iqs620_pwm_platform_driver);
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MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
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MODULE_DESCRIPTION("Azoteq IQS620A PWM Generator");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:iqs620a-pwm");
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