mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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862 lines
22 KiB
C
862 lines
22 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2018 Intel Corporation. All rights reserved.
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//
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// Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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//
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// Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided
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// by platform driver code.
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//
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#include <linux/mutex.h>
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#include <linux/types.h>
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#include "sof-priv.h"
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#include "sof-audio.h"
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#include "ops.h"
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static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id);
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static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd);
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/*
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* IPC message Tx/Rx message handling.
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*/
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/* SOF generic IPC data */
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struct snd_sof_ipc {
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struct snd_sof_dev *sdev;
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/* protects messages and the disable flag */
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struct mutex tx_mutex;
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/* disables further sending of ipc's */
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bool disable_ipc_tx;
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struct snd_sof_ipc_msg msg;
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};
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struct sof_ipc_ctrl_data_params {
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size_t msg_bytes;
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size_t hdr_bytes;
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size_t pl_size;
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size_t elems;
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u32 num_msg;
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u8 *src;
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u8 *dst;
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};
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
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static void ipc_log_header(struct device *dev, u8 *text, u32 cmd)
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{
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u8 *str;
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u8 *str2 = NULL;
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u32 glb;
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u32 type;
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glb = cmd & SOF_GLB_TYPE_MASK;
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type = cmd & SOF_CMD_TYPE_MASK;
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switch (glb) {
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case SOF_IPC_GLB_REPLY:
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str = "GLB_REPLY"; break;
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case SOF_IPC_GLB_COMPOUND:
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str = "GLB_COMPOUND"; break;
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case SOF_IPC_GLB_TPLG_MSG:
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str = "GLB_TPLG_MSG";
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switch (type) {
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case SOF_IPC_TPLG_COMP_NEW:
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str2 = "COMP_NEW"; break;
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case SOF_IPC_TPLG_COMP_FREE:
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str2 = "COMP_FREE"; break;
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case SOF_IPC_TPLG_COMP_CONNECT:
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str2 = "COMP_CONNECT"; break;
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case SOF_IPC_TPLG_PIPE_NEW:
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str2 = "PIPE_NEW"; break;
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case SOF_IPC_TPLG_PIPE_FREE:
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str2 = "PIPE_FREE"; break;
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case SOF_IPC_TPLG_PIPE_CONNECT:
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str2 = "PIPE_CONNECT"; break;
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case SOF_IPC_TPLG_PIPE_COMPLETE:
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str2 = "PIPE_COMPLETE"; break;
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case SOF_IPC_TPLG_BUFFER_NEW:
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str2 = "BUFFER_NEW"; break;
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case SOF_IPC_TPLG_BUFFER_FREE:
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str2 = "BUFFER_FREE"; break;
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default:
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str2 = "unknown type"; break;
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}
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break;
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case SOF_IPC_GLB_PM_MSG:
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str = "GLB_PM_MSG";
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switch (type) {
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case SOF_IPC_PM_CTX_SAVE:
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str2 = "CTX_SAVE"; break;
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case SOF_IPC_PM_CTX_RESTORE:
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str2 = "CTX_RESTORE"; break;
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case SOF_IPC_PM_CTX_SIZE:
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str2 = "CTX_SIZE"; break;
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case SOF_IPC_PM_CLK_SET:
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str2 = "CLK_SET"; break;
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case SOF_IPC_PM_CLK_GET:
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str2 = "CLK_GET"; break;
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case SOF_IPC_PM_CLK_REQ:
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str2 = "CLK_REQ"; break;
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case SOF_IPC_PM_CORE_ENABLE:
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str2 = "CORE_ENABLE"; break;
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default:
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str2 = "unknown type"; break;
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}
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break;
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case SOF_IPC_GLB_COMP_MSG:
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str = "GLB_COMP_MSG";
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switch (type) {
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case SOF_IPC_COMP_SET_VALUE:
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str2 = "SET_VALUE"; break;
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case SOF_IPC_COMP_GET_VALUE:
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str2 = "GET_VALUE"; break;
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case SOF_IPC_COMP_SET_DATA:
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str2 = "SET_DATA"; break;
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case SOF_IPC_COMP_GET_DATA:
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str2 = "GET_DATA"; break;
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default:
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str2 = "unknown type"; break;
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}
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break;
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case SOF_IPC_GLB_STREAM_MSG:
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str = "GLB_STREAM_MSG";
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switch (type) {
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case SOF_IPC_STREAM_PCM_PARAMS:
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str2 = "PCM_PARAMS"; break;
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case SOF_IPC_STREAM_PCM_PARAMS_REPLY:
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str2 = "PCM_REPLY"; break;
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case SOF_IPC_STREAM_PCM_FREE:
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str2 = "PCM_FREE"; break;
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case SOF_IPC_STREAM_TRIG_START:
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str2 = "TRIG_START"; break;
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case SOF_IPC_STREAM_TRIG_STOP:
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str2 = "TRIG_STOP"; break;
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case SOF_IPC_STREAM_TRIG_PAUSE:
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str2 = "TRIG_PAUSE"; break;
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case SOF_IPC_STREAM_TRIG_RELEASE:
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str2 = "TRIG_RELEASE"; break;
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case SOF_IPC_STREAM_TRIG_DRAIN:
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str2 = "TRIG_DRAIN"; break;
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case SOF_IPC_STREAM_TRIG_XRUN:
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str2 = "TRIG_XRUN"; break;
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case SOF_IPC_STREAM_POSITION:
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str2 = "POSITION"; break;
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case SOF_IPC_STREAM_VORBIS_PARAMS:
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str2 = "VORBIS_PARAMS"; break;
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case SOF_IPC_STREAM_VORBIS_FREE:
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str2 = "VORBIS_FREE"; break;
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default:
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str2 = "unknown type"; break;
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}
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break;
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case SOF_IPC_FW_READY:
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str = "FW_READY"; break;
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case SOF_IPC_GLB_DAI_MSG:
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str = "GLB_DAI_MSG";
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switch (type) {
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case SOF_IPC_DAI_CONFIG:
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str2 = "CONFIG"; break;
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case SOF_IPC_DAI_LOOPBACK:
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str2 = "LOOPBACK"; break;
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default:
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str2 = "unknown type"; break;
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}
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break;
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case SOF_IPC_GLB_TRACE_MSG:
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str = "GLB_TRACE_MSG"; break;
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case SOF_IPC_GLB_TEST_MSG:
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str = "GLB_TEST_MSG";
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switch (type) {
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case SOF_IPC_TEST_IPC_FLOOD:
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str2 = "IPC_FLOOD"; break;
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default:
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str2 = "unknown type"; break;
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}
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break;
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default:
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str = "unknown GLB command"; break;
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}
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if (str2)
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dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2);
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else
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dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str);
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}
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#else
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static inline void ipc_log_header(struct device *dev, u8 *text, u32 cmd)
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{
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if ((cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_TRACE_MSG)
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dev_dbg(dev, "%s: 0x%x\n", text, cmd);
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}
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#endif
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/* wait for IPC message reply */
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static int tx_wait_done(struct snd_sof_ipc *ipc, struct snd_sof_ipc_msg *msg,
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void *reply_data)
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{
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struct snd_sof_dev *sdev = ipc->sdev;
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struct sof_ipc_cmd_hdr *hdr = msg->msg_data;
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int ret;
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/* wait for DSP IPC completion */
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ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
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msecs_to_jiffies(sdev->ipc_timeout));
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if (ret == 0) {
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dev_err(sdev->dev, "error: ipc timed out for 0x%x size %d\n",
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hdr->cmd, hdr->size);
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snd_sof_handle_fw_exception(ipc->sdev);
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ret = -ETIMEDOUT;
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} else {
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ret = msg->reply_error;
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if (ret < 0) {
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dev_err(sdev->dev, "error: ipc error for 0x%x size %zu\n",
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hdr->cmd, msg->reply_size);
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} else {
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ipc_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd);
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if (msg->reply_size)
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/* copy the data returned from DSP */
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memcpy(reply_data, msg->reply_data,
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msg->reply_size);
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}
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}
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return ret;
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}
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/* send IPC message from host to DSP */
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static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc *ipc, u32 header,
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void *msg_data, size_t msg_bytes,
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void *reply_data, size_t reply_bytes)
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{
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struct snd_sof_dev *sdev = ipc->sdev;
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struct snd_sof_ipc_msg *msg;
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int ret;
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if (ipc->disable_ipc_tx)
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return -ENODEV;
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/*
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* The spin-lock is also still needed to protect message objects against
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* other atomic contexts.
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*/
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spin_lock_irq(&sdev->ipc_lock);
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/* initialise the message */
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msg = &ipc->msg;
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msg->header = header;
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msg->msg_size = msg_bytes;
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msg->reply_size = reply_bytes;
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msg->reply_error = 0;
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/* attach any data */
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if (msg_bytes)
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memcpy(msg->msg_data, msg_data, msg_bytes);
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sdev->msg = msg;
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ret = snd_sof_dsp_send_msg(sdev, msg);
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/* Next reply that we receive will be related to this message */
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if (!ret)
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msg->ipc_complete = false;
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spin_unlock_irq(&sdev->ipc_lock);
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if (ret < 0) {
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dev_err_ratelimited(sdev->dev,
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"error: ipc tx failed with error %d\n",
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ret);
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return ret;
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}
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ipc_log_header(sdev->dev, "ipc tx", msg->header);
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/* now wait for completion */
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if (!ret)
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ret = tx_wait_done(ipc, msg, reply_data);
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return ret;
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}
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/* send IPC message from host to DSP */
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int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header,
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void *msg_data, size_t msg_bytes, void *reply_data,
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size_t reply_bytes)
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{
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const struct sof_dsp_power_state target_state = {
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.state = SOF_DSP_PM_D0,
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};
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int ret;
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/* ensure the DSP is in D0 before sending a new IPC */
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ret = snd_sof_dsp_set_power_state(ipc->sdev, &target_state);
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if (ret < 0) {
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dev_err(ipc->sdev->dev, "error: resuming DSP %d\n", ret);
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return ret;
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}
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return sof_ipc_tx_message_no_pm(ipc, header, msg_data, msg_bytes,
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reply_data, reply_bytes);
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}
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EXPORT_SYMBOL(sof_ipc_tx_message);
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/*
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* send IPC message from host to DSP without modifying the DSP state.
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* This will be used for IPC's that can be handled by the DSP
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* even in a low-power D0 substate.
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*/
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int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header,
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void *msg_data, size_t msg_bytes,
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void *reply_data, size_t reply_bytes)
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{
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int ret;
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if (msg_bytes > SOF_IPC_MSG_MAX_SIZE ||
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reply_bytes > SOF_IPC_MSG_MAX_SIZE)
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return -ENOBUFS;
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/* Serialise IPC TX */
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mutex_lock(&ipc->tx_mutex);
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ret = sof_ipc_tx_message_unlocked(ipc, header, msg_data, msg_bytes,
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reply_data, reply_bytes);
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mutex_unlock(&ipc->tx_mutex);
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return ret;
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}
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EXPORT_SYMBOL(sof_ipc_tx_message_no_pm);
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/* handle reply message from DSP */
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int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id)
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{
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struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
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if (msg->ipc_complete) {
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dev_err(sdev->dev, "error: no reply expected, received 0x%x",
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msg_id);
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return -EINVAL;
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}
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/* wake up and return the error if we have waiters on this message ? */
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msg->ipc_complete = true;
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wake_up(&msg->waitq);
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return 0;
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}
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EXPORT_SYMBOL(snd_sof_ipc_reply);
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/* DSP firmware has sent host a message */
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void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev)
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{
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struct sof_ipc_cmd_hdr hdr;
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u32 cmd, type;
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int err = 0;
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/* read back header */
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snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr));
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ipc_log_header(sdev->dev, "ipc rx", hdr.cmd);
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cmd = hdr.cmd & SOF_GLB_TYPE_MASK;
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type = hdr.cmd & SOF_CMD_TYPE_MASK;
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/* check message type */
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switch (cmd) {
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case SOF_IPC_GLB_REPLY:
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dev_err(sdev->dev, "error: ipc reply unknown\n");
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break;
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case SOF_IPC_FW_READY:
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/* check for FW boot completion */
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if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) {
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err = sof_ops(sdev)->fw_ready(sdev, cmd);
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if (err < 0)
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sdev->fw_state = SOF_FW_BOOT_READY_FAILED;
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else
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sdev->fw_state = SOF_FW_BOOT_COMPLETE;
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/* wake up firmware loader */
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wake_up(&sdev->boot_wait);
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}
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break;
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case SOF_IPC_GLB_COMPOUND:
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case SOF_IPC_GLB_TPLG_MSG:
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case SOF_IPC_GLB_PM_MSG:
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case SOF_IPC_GLB_COMP_MSG:
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break;
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case SOF_IPC_GLB_STREAM_MSG:
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/* need to pass msg id into the function */
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ipc_stream_message(sdev, hdr.cmd);
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break;
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case SOF_IPC_GLB_TRACE_MSG:
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ipc_trace_message(sdev, type);
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break;
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default:
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dev_err(sdev->dev, "error: unknown DSP message 0x%x\n", cmd);
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break;
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}
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ipc_log_header(sdev->dev, "ipc rx done", hdr.cmd);
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}
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EXPORT_SYMBOL(snd_sof_ipc_msgs_rx);
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/*
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* IPC trace mechanism.
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*/
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static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id)
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{
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struct sof_ipc_dma_trace_posn posn;
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switch (msg_id) {
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case SOF_IPC_TRACE_DMA_POSITION:
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/* read back full message */
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snd_sof_ipc_msg_data(sdev, NULL, &posn, sizeof(posn));
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snd_sof_trace_update_pos(sdev, &posn);
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break;
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default:
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dev_err(sdev->dev, "error: unhandled trace message %x\n",
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msg_id);
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break;
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}
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}
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/*
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* IPC stream position.
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*/
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static void ipc_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id)
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{
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struct snd_soc_component *scomp = sdev->component;
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struct snd_sof_pcm_stream *stream;
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struct sof_ipc_stream_posn posn;
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struct snd_sof_pcm *spcm;
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int direction;
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spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction);
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if (!spcm) {
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dev_err(sdev->dev,
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"error: period elapsed for unknown stream, msg_id %d\n",
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msg_id);
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return;
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}
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stream = &spcm->stream[direction];
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snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
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dev_dbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n",
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posn.host_posn, posn.dai_posn, posn.wallclock);
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memcpy(&stream->posn, &posn, sizeof(posn));
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/* only inform ALSA for period_wakeup mode */
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if (!stream->substream->runtime->no_period_wakeup)
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snd_sof_pcm_period_elapsed(stream->substream);
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}
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/* DSP notifies host of an XRUN within FW */
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static void ipc_xrun(struct snd_sof_dev *sdev, u32 msg_id)
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{
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struct snd_soc_component *scomp = sdev->component;
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struct snd_sof_pcm_stream *stream;
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struct sof_ipc_stream_posn posn;
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struct snd_sof_pcm *spcm;
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int direction;
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spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction);
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if (!spcm) {
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dev_err(sdev->dev, "error: XRUN for unknown stream, msg_id %d\n",
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msg_id);
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return;
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}
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stream = &spcm->stream[direction];
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snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
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dev_dbg(sdev->dev, "posn XRUN: host %llx comp %d size %d\n",
|
|
posn.host_posn, posn.xrun_comp_id, posn.xrun_size);
|
|
|
|
#if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP)
|
|
/* stop PCM on XRUN - used for pipeline debug */
|
|
memcpy(&stream->posn, &posn, sizeof(posn));
|
|
snd_pcm_stop_xrun(stream->substream);
|
|
#endif
|
|
}
|
|
|
|
/* stream notifications from DSP FW */
|
|
static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd)
|
|
{
|
|
/* get msg cmd type and msd id */
|
|
u32 msg_type = msg_cmd & SOF_CMD_TYPE_MASK;
|
|
u32 msg_id = SOF_IPC_MESSAGE_ID(msg_cmd);
|
|
|
|
switch (msg_type) {
|
|
case SOF_IPC_STREAM_POSITION:
|
|
ipc_period_elapsed(sdev, msg_id);
|
|
break;
|
|
case SOF_IPC_STREAM_TRIG_XRUN:
|
|
ipc_xrun(sdev, msg_id);
|
|
break;
|
|
default:
|
|
dev_err(sdev->dev, "error: unhandled stream message %x\n",
|
|
msg_id);
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* get stream position IPC - use faster MMIO method if available on platform */
|
|
int snd_sof_ipc_stream_posn(struct snd_soc_component *scomp,
|
|
struct snd_sof_pcm *spcm, int direction,
|
|
struct sof_ipc_stream_posn *posn)
|
|
{
|
|
struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp);
|
|
struct sof_ipc_stream stream;
|
|
int err;
|
|
|
|
/* read position via slower IPC */
|
|
stream.hdr.size = sizeof(stream);
|
|
stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_POSITION;
|
|
stream.comp_id = spcm->stream[direction].comp_id;
|
|
|
|
/* send IPC to the DSP */
|
|
err = sof_ipc_tx_message(sdev->ipc,
|
|
stream.hdr.cmd, &stream, sizeof(stream), posn,
|
|
sizeof(*posn));
|
|
if (err < 0) {
|
|
dev_err(sdev->dev, "error: failed to get stream %d position\n",
|
|
stream.comp_id);
|
|
return err;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(snd_sof_ipc_stream_posn);
|
|
|
|
static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type,
|
|
struct sof_ipc_ctrl_data *src,
|
|
struct sof_ipc_ctrl_data *dst,
|
|
struct sof_ipc_ctrl_data_params *sparams)
|
|
{
|
|
switch (ctrl_type) {
|
|
case SOF_CTRL_TYPE_VALUE_CHAN_GET:
|
|
case SOF_CTRL_TYPE_VALUE_CHAN_SET:
|
|
sparams->src = (u8 *)src->chanv;
|
|
sparams->dst = (u8 *)dst->chanv;
|
|
break;
|
|
case SOF_CTRL_TYPE_VALUE_COMP_GET:
|
|
case SOF_CTRL_TYPE_VALUE_COMP_SET:
|
|
sparams->src = (u8 *)src->compv;
|
|
sparams->dst = (u8 *)dst->compv;
|
|
break;
|
|
case SOF_CTRL_TYPE_DATA_GET:
|
|
case SOF_CTRL_TYPE_DATA_SET:
|
|
sparams->src = (u8 *)src->data->data;
|
|
sparams->dst = (u8 *)dst->data->data;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* calculate payload size and number of messages */
|
|
sparams->pl_size = SOF_IPC_MSG_MAX_SIZE - sparams->hdr_bytes;
|
|
sparams->num_msg = DIV_ROUND_UP(sparams->msg_bytes, sparams->pl_size);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sof_set_get_large_ctrl_data(struct snd_sof_dev *sdev,
|
|
struct sof_ipc_ctrl_data *cdata,
|
|
struct sof_ipc_ctrl_data_params *sparams,
|
|
bool send)
|
|
{
|
|
struct sof_ipc_ctrl_data *partdata;
|
|
size_t send_bytes;
|
|
size_t offset = 0;
|
|
size_t msg_bytes;
|
|
size_t pl_size;
|
|
int err;
|
|
int i;
|
|
|
|
/* allocate max ipc size because we have at least one */
|
|
partdata = kzalloc(SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL);
|
|
if (!partdata)
|
|
return -ENOMEM;
|
|
|
|
if (send)
|
|
err = sof_get_ctrl_copy_params(cdata->type, cdata, partdata,
|
|
sparams);
|
|
else
|
|
err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata,
|
|
sparams);
|
|
if (err < 0) {
|
|
kfree(partdata);
|
|
return err;
|
|
}
|
|
|
|
msg_bytes = sparams->msg_bytes;
|
|
pl_size = sparams->pl_size;
|
|
|
|
/* copy the header data */
|
|
memcpy(partdata, cdata, sparams->hdr_bytes);
|
|
|
|
/* Serialise IPC TX */
|
|
mutex_lock(&sdev->ipc->tx_mutex);
|
|
|
|
/* copy the payload data in a loop */
|
|
for (i = 0; i < sparams->num_msg; i++) {
|
|
send_bytes = min(msg_bytes, pl_size);
|
|
partdata->num_elems = send_bytes;
|
|
partdata->rhdr.hdr.size = sparams->hdr_bytes + send_bytes;
|
|
partdata->msg_index = i;
|
|
msg_bytes -= send_bytes;
|
|
partdata->elems_remaining = msg_bytes;
|
|
|
|
if (send)
|
|
memcpy(sparams->dst, sparams->src + offset, send_bytes);
|
|
|
|
err = sof_ipc_tx_message_unlocked(sdev->ipc,
|
|
partdata->rhdr.hdr.cmd,
|
|
partdata,
|
|
partdata->rhdr.hdr.size,
|
|
partdata,
|
|
partdata->rhdr.hdr.size);
|
|
if (err < 0)
|
|
break;
|
|
|
|
if (!send)
|
|
memcpy(sparams->dst + offset, sparams->src, send_bytes);
|
|
|
|
offset += pl_size;
|
|
}
|
|
|
|
mutex_unlock(&sdev->ipc->tx_mutex);
|
|
|
|
kfree(partdata);
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* IPC get()/set() for kcontrols.
|
|
*/
|
|
int snd_sof_ipc_set_get_comp_data(struct snd_sof_control *scontrol,
|
|
u32 ipc_cmd,
|
|
enum sof_ipc_ctrl_type ctrl_type,
|
|
enum sof_ipc_ctrl_cmd ctrl_cmd,
|
|
bool send)
|
|
{
|
|
struct snd_soc_component *scomp = scontrol->scomp;
|
|
struct sof_ipc_ctrl_data *cdata = scontrol->control_data;
|
|
struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp);
|
|
struct sof_ipc_fw_ready *ready = &sdev->fw_ready;
|
|
struct sof_ipc_fw_version *v = &ready->version;
|
|
struct sof_ipc_ctrl_data_params sparams;
|
|
size_t send_bytes;
|
|
int err;
|
|
|
|
/* read or write firmware volume */
|
|
if (scontrol->readback_offset != 0) {
|
|
/* write/read value header via mmaped region */
|
|
send_bytes = sizeof(struct sof_ipc_ctrl_value_chan) *
|
|
cdata->num_elems;
|
|
if (send)
|
|
snd_sof_dsp_block_write(sdev, sdev->mmio_bar,
|
|
scontrol->readback_offset,
|
|
cdata->chanv, send_bytes);
|
|
|
|
else
|
|
snd_sof_dsp_block_read(sdev, sdev->mmio_bar,
|
|
scontrol->readback_offset,
|
|
cdata->chanv, send_bytes);
|
|
return 0;
|
|
}
|
|
|
|
cdata->rhdr.hdr.cmd = SOF_IPC_GLB_COMP_MSG | ipc_cmd;
|
|
cdata->cmd = ctrl_cmd;
|
|
cdata->type = ctrl_type;
|
|
cdata->comp_id = scontrol->comp_id;
|
|
cdata->msg_index = 0;
|
|
|
|
/* calculate header and data size */
|
|
switch (cdata->type) {
|
|
case SOF_CTRL_TYPE_VALUE_CHAN_GET:
|
|
case SOF_CTRL_TYPE_VALUE_CHAN_SET:
|
|
sparams.msg_bytes = scontrol->num_channels *
|
|
sizeof(struct sof_ipc_ctrl_value_chan);
|
|
sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data);
|
|
sparams.elems = scontrol->num_channels;
|
|
break;
|
|
case SOF_CTRL_TYPE_VALUE_COMP_GET:
|
|
case SOF_CTRL_TYPE_VALUE_COMP_SET:
|
|
sparams.msg_bytes = scontrol->num_channels *
|
|
sizeof(struct sof_ipc_ctrl_value_comp);
|
|
sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data);
|
|
sparams.elems = scontrol->num_channels;
|
|
break;
|
|
case SOF_CTRL_TYPE_DATA_GET:
|
|
case SOF_CTRL_TYPE_DATA_SET:
|
|
sparams.msg_bytes = cdata->data->size;
|
|
sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data) +
|
|
sizeof(struct sof_abi_hdr);
|
|
sparams.elems = cdata->data->size;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
cdata->rhdr.hdr.size = sparams.msg_bytes + sparams.hdr_bytes;
|
|
cdata->num_elems = sparams.elems;
|
|
cdata->elems_remaining = 0;
|
|
|
|
/* send normal size ipc in one part */
|
|
if (cdata->rhdr.hdr.size <= SOF_IPC_MSG_MAX_SIZE) {
|
|
err = sof_ipc_tx_message(sdev->ipc, cdata->rhdr.hdr.cmd, cdata,
|
|
cdata->rhdr.hdr.size, cdata,
|
|
cdata->rhdr.hdr.size);
|
|
|
|
if (err < 0)
|
|
dev_err(sdev->dev, "error: set/get ctrl ipc comp %d\n",
|
|
cdata->comp_id);
|
|
|
|
return err;
|
|
}
|
|
|
|
/* data is bigger than max ipc size, chop into smaller pieces */
|
|
dev_dbg(sdev->dev, "large ipc size %u, control size %u\n",
|
|
cdata->rhdr.hdr.size, scontrol->size);
|
|
|
|
/* large messages is only supported from ABI 3.3.0 onwards */
|
|
if (v->abi_version < SOF_ABI_VER(3, 3, 0)) {
|
|
dev_err(sdev->dev, "error: incompatible FW ABI version\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
err = sof_set_get_large_ctrl_data(sdev, cdata, &sparams, send);
|
|
|
|
if (err < 0)
|
|
dev_err(sdev->dev, "error: set/get large ctrl ipc comp %d\n",
|
|
cdata->comp_id);
|
|
|
|
return err;
|
|
}
|
|
EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data);
|
|
|
|
/*
|
|
* IPC layer enumeration.
|
|
*/
|
|
|
|
int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox,
|
|
size_t dspbox_size, u32 hostbox,
|
|
size_t hostbox_size)
|
|
{
|
|
sdev->dsp_box.offset = dspbox;
|
|
sdev->dsp_box.size = dspbox_size;
|
|
sdev->host_box.offset = hostbox;
|
|
sdev->host_box.size = hostbox_size;
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(snd_sof_dsp_mailbox_init);
|
|
|
|
int snd_sof_ipc_valid(struct snd_sof_dev *sdev)
|
|
{
|
|
struct sof_ipc_fw_ready *ready = &sdev->fw_ready;
|
|
struct sof_ipc_fw_version *v = &ready->version;
|
|
|
|
dev_info(sdev->dev,
|
|
"Firmware info: version %d:%d:%d-%s\n", v->major, v->minor,
|
|
v->micro, v->tag);
|
|
dev_info(sdev->dev,
|
|
"Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n",
|
|
SOF_ABI_VERSION_MAJOR(v->abi_version),
|
|
SOF_ABI_VERSION_MINOR(v->abi_version),
|
|
SOF_ABI_VERSION_PATCH(v->abi_version),
|
|
SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH);
|
|
|
|
if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) {
|
|
dev_err(sdev->dev, "error: incompatible FW ABI version\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (v->abi_version > SOF_ABI_VERSION) {
|
|
if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS)) {
|
|
dev_warn(sdev->dev, "warn: FW ABI is more recent than kernel\n");
|
|
} else {
|
|
dev_err(sdev->dev, "error: FW ABI is more recent than kernel\n");
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
if (ready->flags & SOF_IPC_INFO_BUILD) {
|
|
dev_info(sdev->dev,
|
|
"Firmware debug build %d on %s-%s - options:\n"
|
|
" GDB: %s\n"
|
|
" lock debug: %s\n"
|
|
" lock vdebug: %s\n",
|
|
v->build, v->date, v->time,
|
|
(ready->flags & SOF_IPC_INFO_GDB) ?
|
|
"enabled" : "disabled",
|
|
(ready->flags & SOF_IPC_INFO_LOCKS) ?
|
|
"enabled" : "disabled",
|
|
(ready->flags & SOF_IPC_INFO_LOCKSV) ?
|
|
"enabled" : "disabled");
|
|
}
|
|
|
|
/* copy the fw_version into debugfs at first boot */
|
|
memcpy(&sdev->fw_version, v, sizeof(*v));
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(snd_sof_ipc_valid);
|
|
|
|
struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev)
|
|
{
|
|
struct snd_sof_ipc *ipc;
|
|
struct snd_sof_ipc_msg *msg;
|
|
|
|
ipc = devm_kzalloc(sdev->dev, sizeof(*ipc), GFP_KERNEL);
|
|
if (!ipc)
|
|
return NULL;
|
|
|
|
mutex_init(&ipc->tx_mutex);
|
|
ipc->sdev = sdev;
|
|
msg = &ipc->msg;
|
|
|
|
/* indicate that we aren't sending a message ATM */
|
|
msg->ipc_complete = true;
|
|
|
|
/* pre-allocate message data */
|
|
msg->msg_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE,
|
|
GFP_KERNEL);
|
|
if (!msg->msg_data)
|
|
return NULL;
|
|
|
|
msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE,
|
|
GFP_KERNEL);
|
|
if (!msg->reply_data)
|
|
return NULL;
|
|
|
|
init_waitqueue_head(&msg->waitq);
|
|
|
|
return ipc;
|
|
}
|
|
EXPORT_SYMBOL(snd_sof_ipc_init);
|
|
|
|
void snd_sof_ipc_free(struct snd_sof_dev *sdev)
|
|
{
|
|
struct snd_sof_ipc *ipc = sdev->ipc;
|
|
|
|
if (!ipc)
|
|
return;
|
|
|
|
/* disable sending of ipc's */
|
|
mutex_lock(&ipc->tx_mutex);
|
|
ipc->disable_ipc_tx = true;
|
|
mutex_unlock(&ipc->tx_mutex);
|
|
}
|
|
EXPORT_SYMBOL(snd_sof_ipc_free);
|