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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3169ab00e0
We use property "sdhci,auto-cmd12" instead of "fsl,sdhci-auto-cmd12" to distinguish if the sdhc host has quirk SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12. Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
194 lines
4.5 KiB
Plaintext
194 lines
4.5 KiB
Plaintext
/*
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* BSC9131 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2011-2012 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&ifc {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "fsl,ifc", "simple-bus";
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interrupts = <16 2 0 0 20 2 0 0>;
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};
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "fsl,bsc9131-immr", "simple-bus";
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bus-frequency = <0>; // Filled out by uboot.
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ecm-law@0 {
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compatible = "fsl,ecm-law";
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reg = <0x0 0x1000>;
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fsl,num-laws = <12>;
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};
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ecm@1000 {
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compatible = "fsl,bsc9131-ecm", "fsl,ecm";
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reg = <0x1000 0x1000>;
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interrupts = <16 2 0 0>;
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};
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memory-controller@2000 {
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compatible = "fsl,bsc9131-memory-controller";
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reg = <0x2000 0x1000>;
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interrupts = <16 2 0 0>;
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};
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/include/ "pq3-i2c-0.dtsi"
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i2c@3000 {
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interrupts = <17 2 0 0>;
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};
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/include/ "pq3-i2c-1.dtsi"
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i2c@3100 {
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interrupts = <17 2 0 0>;
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};
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/include/ "pq3-duart-0.dtsi"
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serial0: serial@4500 {
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interrupts = <18 2 0 0>;
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};
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serial1: serial@4600 {
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interrupts = <18 2 0 0 >;
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};
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/include/ "pq3-espi-0.dtsi"
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spi0: spi@7000 {
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fsl,espi-num-chipselects = <1>;
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interrupts = <22 0x2 0 0>;
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};
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/include/ "pq3-gpio-0.dtsi"
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gpio-controller@f000 {
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interrupts = <19 0x2 0 0>;
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};
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L2: l2-cache-controller@20000 {
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compatible = "fsl,bsc9131-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>; // 32 bytes
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cache-size = <0x40000>; // L2,256K
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interrupts = <16 2 0 0>;
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};
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/include/ "pq3-dma-0.dtsi"
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dma@21300 {
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dma-channel@0 {
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interrupts = <62 2 0 0>;
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};
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dma-channel@80 {
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interrupts = <63 2 0 0>;
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};
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dma-channel@100 {
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interrupts = <64 2 0 0>;
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};
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dma-channel@180 {
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interrupts = <65 2 0 0>;
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};
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};
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/include/ "pq3-usb2-dr-0.dtsi"
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usb@22000 {
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compatible = "fsl-usb2-dr","fsl-usb2-dr-v2.2";
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interrupts = <40 0x2 0 0>;
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};
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/include/ "pq3-esdhc-0.dtsi"
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sdhc@2e000 {
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sdhci,auto-cmd12;
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interrupts = <41 0x2 0 0>;
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};
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/include/ "pq3-sec4.4-0.dtsi"
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crypto@30000 {
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interrupts = <57 2 0 0>;
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sec_jr0: jr@1000 {
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interrupts = <58 2 0 0>;
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};
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sec_jr1: jr@2000 {
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interrupts = <59 2 0 0>;
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};
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sec_jr2: jr@3000 {
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interrupts = <60 2 0 0>;
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};
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sec_jr3: jr@4000 {
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interrupts = <61 2 0 0>;
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};
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};
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/include/ "pq3-mpic.dtsi"
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timer@41100 {
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compatible = "fsl,mpic-v1.2-msgr", "fsl,mpic-msg";
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reg = <0x41400 0x200>;
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interrupts = <
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0xb0 2
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0xb1 2
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0xb2 2
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0xb3 2>;
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};
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/include/ "pq3-etsec2-0.dtsi"
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enet0: ethernet@b0000 {
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queue-group@b0000 {
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fsl,rx-bit-map = <0xff>;
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fsl,tx-bit-map = <0xff>;
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interrupts = <26 2 0 0 27 2 0 0 28 2 0 0>;
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};
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};
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/include/ "pq3-etsec2-1.dtsi"
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enet1: ethernet@b1000 {
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queue-group@b1000 {
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fsl,rx-bit-map = <0xff>;
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fsl,tx-bit-map = <0xff>;
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interrupts = <33 2 0 0 34 2 0 0 35 2 0 0>;
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};
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};
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global-utilities@e0000 {
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compatible = "fsl,bsc9131-guts";
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reg = <0xe0000 0x1000>;
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fsl,has-rstcr;
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};
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};
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