mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 19:55:21 +07:00
af5395c214
Add TIF_SYSCALL_TRACEPOINT flag definition; add _TIF_SYSCALL_TRACEPOINT to _TIF_WORK_MASK. Call trace_sys_enter from do_syscall_trace_enter and trace_sys_exit from do_syscall_trace_leave when TIF_SYSCALL_TRACEPOINT flag is set. Add declaration of sys_call_table to arch/xtensa/include/asm/syscall.h Add definition of NR_syscalls to arch/xtensa/include/asm/unistd.h Select HAVE_SYSCALL_TRACEPOINTS. This change allows tracing each syscall entry and exit through the ftrace mechanism. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
567 lines
13 KiB
C
567 lines
13 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2007 Tensilica Inc.
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*
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* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
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* Chris Zankel <chris@zankel.net>
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* Scott Foehner<sfoehner@yahoo.com>,
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* Kevin Chea
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* Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
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*/
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#include <linux/errno.h>
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#include <linux/hw_breakpoint.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/perf_event.h>
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#include <linux/ptrace.h>
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#include <linux/regset.h>
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#include <linux/sched.h>
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#include <linux/sched/task_stack.h>
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#include <linux/security.h>
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#include <linux/signal.h>
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#include <linux/smp.h>
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#include <linux/tracehook.h>
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#include <linux/uaccess.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/syscalls.h>
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#include <asm/coprocessor.h>
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#include <asm/elf.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/ptrace.h>
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static int gpr_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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struct pt_regs *regs = task_pt_regs(target);
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struct user_pt_regs newregs = {
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.pc = regs->pc,
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.ps = regs->ps & ~(1 << PS_EXCM_BIT),
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.lbeg = regs->lbeg,
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.lend = regs->lend,
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.lcount = regs->lcount,
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.sar = regs->sar,
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.threadptr = regs->threadptr,
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.windowbase = regs->windowbase,
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.windowstart = regs->windowstart,
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};
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memcpy(newregs.a,
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regs->areg + XCHAL_NUM_AREGS - regs->windowbase * 4,
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regs->windowbase * 16);
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memcpy(newregs.a + regs->windowbase * 4,
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regs->areg,
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(WSBITS - regs->windowbase) * 16);
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&newregs, 0, -1);
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}
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static int gpr_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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struct user_pt_regs newregs = {0};
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struct pt_regs *regs;
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const u32 ps_mask = PS_CALLINC_MASK | PS_OWB_MASK;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
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if (ret)
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return ret;
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if (newregs.windowbase >= XCHAL_NUM_AREGS / 4)
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return -EINVAL;
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regs = task_pt_regs(target);
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regs->pc = newregs.pc;
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regs->ps = (regs->ps & ~ps_mask) | (newregs.ps & ps_mask);
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regs->lbeg = newregs.lbeg;
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regs->lend = newregs.lend;
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regs->lcount = newregs.lcount;
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regs->sar = newregs.sar;
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regs->threadptr = newregs.threadptr;
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if (newregs.windowbase != regs->windowbase ||
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newregs.windowstart != regs->windowstart) {
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u32 rotws, wmask;
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rotws = (((newregs.windowstart |
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(newregs.windowstart << WSBITS)) >>
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newregs.windowbase) &
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((1 << WSBITS) - 1)) & ~1;
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wmask = ((rotws ? WSBITS + 1 - ffs(rotws) : 0) << 4) |
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(rotws & 0xF) | 1;
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regs->windowbase = newregs.windowbase;
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regs->windowstart = newregs.windowstart;
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regs->wmask = wmask;
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}
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memcpy(regs->areg + XCHAL_NUM_AREGS - newregs.windowbase * 4,
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newregs.a, newregs.windowbase * 16);
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memcpy(regs->areg, newregs.a + newregs.windowbase * 4,
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(WSBITS - newregs.windowbase) * 16);
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return 0;
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}
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static int tie_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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int ret;
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struct pt_regs *regs = task_pt_regs(target);
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struct thread_info *ti = task_thread_info(target);
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elf_xtregs_t *newregs = kzalloc(sizeof(elf_xtregs_t), GFP_KERNEL);
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if (!newregs)
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return -ENOMEM;
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newregs->opt = regs->xtregs_opt;
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newregs->user = ti->xtregs_user;
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#if XTENSA_HAVE_COPROCESSORS
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/* Flush all coprocessor registers to memory. */
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coprocessor_flush_all(ti);
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newregs->cp0 = ti->xtregs_cp.cp0;
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newregs->cp1 = ti->xtregs_cp.cp1;
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newregs->cp2 = ti->xtregs_cp.cp2;
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newregs->cp3 = ti->xtregs_cp.cp3;
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newregs->cp4 = ti->xtregs_cp.cp4;
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newregs->cp5 = ti->xtregs_cp.cp5;
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newregs->cp6 = ti->xtregs_cp.cp6;
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newregs->cp7 = ti->xtregs_cp.cp7;
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#endif
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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newregs, 0, -1);
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kfree(newregs);
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return ret;
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}
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static int tie_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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struct pt_regs *regs = task_pt_regs(target);
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struct thread_info *ti = task_thread_info(target);
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elf_xtregs_t *newregs = kzalloc(sizeof(elf_xtregs_t), GFP_KERNEL);
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if (!newregs)
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return -ENOMEM;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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newregs, 0, -1);
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if (ret)
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goto exit;
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regs->xtregs_opt = newregs->opt;
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ti->xtregs_user = newregs->user;
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#if XTENSA_HAVE_COPROCESSORS
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/* Flush all coprocessors before we overwrite them. */
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coprocessor_flush_all(ti);
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coprocessor_release_all(ti);
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ti->xtregs_cp.cp0 = newregs->cp0;
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ti->xtregs_cp.cp1 = newregs->cp1;
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ti->xtregs_cp.cp2 = newregs->cp2;
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ti->xtregs_cp.cp3 = newregs->cp3;
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ti->xtregs_cp.cp4 = newregs->cp4;
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ti->xtregs_cp.cp5 = newregs->cp5;
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ti->xtregs_cp.cp6 = newregs->cp6;
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ti->xtregs_cp.cp7 = newregs->cp7;
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#endif
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exit:
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kfree(newregs);
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return ret;
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}
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enum xtensa_regset {
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REGSET_GPR,
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REGSET_TIE,
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};
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static const struct user_regset xtensa_regsets[] = {
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[REGSET_GPR] = {
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.core_note_type = NT_PRSTATUS,
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.n = sizeof(struct user_pt_regs) / sizeof(u32),
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.size = sizeof(u32),
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.align = sizeof(u32),
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.get = gpr_get,
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.set = gpr_set,
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},
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[REGSET_TIE] = {
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.core_note_type = NT_PRFPREG,
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.n = sizeof(elf_xtregs_t) / sizeof(u32),
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.size = sizeof(u32),
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.align = sizeof(u32),
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.get = tie_get,
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.set = tie_set,
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},
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};
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static const struct user_regset_view user_xtensa_view = {
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.name = "xtensa",
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.e_machine = EM_XTENSA,
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.regsets = xtensa_regsets,
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.n = ARRAY_SIZE(xtensa_regsets)
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};
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const struct user_regset_view *task_user_regset_view(struct task_struct *task)
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{
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return &user_xtensa_view;
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}
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void user_enable_single_step(struct task_struct *child)
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{
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child->ptrace |= PT_SINGLESTEP;
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}
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void user_disable_single_step(struct task_struct *child)
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{
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child->ptrace &= ~PT_SINGLESTEP;
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}
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/*
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* Called by kernel/ptrace.c when detaching to disable single stepping.
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*/
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void ptrace_disable(struct task_struct *child)
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{
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/* Nothing to do.. */
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}
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static int ptrace_getregs(struct task_struct *child, void __user *uregs)
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{
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return copy_regset_to_user(child, &user_xtensa_view, REGSET_GPR,
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0, sizeof(xtensa_gregset_t), uregs);
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}
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static int ptrace_setregs(struct task_struct *child, void __user *uregs)
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{
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return copy_regset_from_user(child, &user_xtensa_view, REGSET_GPR,
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0, sizeof(xtensa_gregset_t), uregs);
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}
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static int ptrace_getxregs(struct task_struct *child, void __user *uregs)
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{
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return copy_regset_to_user(child, &user_xtensa_view, REGSET_TIE,
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0, sizeof(elf_xtregs_t), uregs);
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}
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static int ptrace_setxregs(struct task_struct *child, void __user *uregs)
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{
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return copy_regset_from_user(child, &user_xtensa_view, REGSET_TIE,
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0, sizeof(elf_xtregs_t), uregs);
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}
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static int ptrace_peekusr(struct task_struct *child, long regno,
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long __user *ret)
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{
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struct pt_regs *regs;
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unsigned long tmp;
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regs = task_pt_regs(child);
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tmp = 0; /* Default return value. */
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switch(regno) {
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case REG_AR_BASE ... REG_AR_BASE + XCHAL_NUM_AREGS - 1:
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tmp = regs->areg[regno - REG_AR_BASE];
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break;
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case REG_A_BASE ... REG_A_BASE + 15:
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tmp = regs->areg[regno - REG_A_BASE];
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break;
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case REG_PC:
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tmp = regs->pc;
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break;
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case REG_PS:
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/* Note: PS.EXCM is not set while user task is running;
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* its being set in regs is for exception handling
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* convenience.
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*/
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tmp = (regs->ps & ~(1 << PS_EXCM_BIT));
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break;
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case REG_WB:
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break; /* tmp = 0 */
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case REG_WS:
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{
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unsigned long wb = regs->windowbase;
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unsigned long ws = regs->windowstart;
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tmp = ((ws >> wb) | (ws << (WSBITS - wb))) &
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((1 << WSBITS) - 1);
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break;
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}
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case REG_LBEG:
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tmp = regs->lbeg;
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break;
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case REG_LEND:
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tmp = regs->lend;
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break;
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case REG_LCOUNT:
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tmp = regs->lcount;
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break;
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case REG_SAR:
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tmp = regs->sar;
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break;
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case SYSCALL_NR:
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tmp = regs->syscall;
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break;
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default:
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return -EIO;
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}
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return put_user(tmp, ret);
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}
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static int ptrace_pokeusr(struct task_struct *child, long regno, long val)
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{
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struct pt_regs *regs;
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regs = task_pt_regs(child);
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switch (regno) {
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case REG_AR_BASE ... REG_AR_BASE + XCHAL_NUM_AREGS - 1:
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regs->areg[regno - REG_AR_BASE] = val;
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break;
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case REG_A_BASE ... REG_A_BASE + 15:
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regs->areg[regno - REG_A_BASE] = val;
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break;
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case REG_PC:
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regs->pc = val;
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break;
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case SYSCALL_NR:
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regs->syscall = val;
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break;
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default:
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return -EIO;
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}
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return 0;
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}
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#ifdef CONFIG_HAVE_HW_BREAKPOINT
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static void ptrace_hbptriggered(struct perf_event *bp,
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struct perf_sample_data *data,
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struct pt_regs *regs)
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{
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int i;
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struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
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if (bp->attr.bp_type & HW_BREAKPOINT_X) {
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for (i = 0; i < XCHAL_NUM_IBREAK; ++i)
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if (current->thread.ptrace_bp[i] == bp)
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break;
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i <<= 1;
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} else {
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for (i = 0; i < XCHAL_NUM_DBREAK; ++i)
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if (current->thread.ptrace_wp[i] == bp)
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break;
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i = (i << 1) | 1;
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}
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force_sig_ptrace_errno_trap(i, (void __user *)bkpt->address);
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}
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static struct perf_event *ptrace_hbp_create(struct task_struct *tsk, int type)
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{
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struct perf_event_attr attr;
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ptrace_breakpoint_init(&attr);
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/* Initialise fields to sane defaults. */
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attr.bp_addr = 0;
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attr.bp_len = 1;
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attr.bp_type = type;
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attr.disabled = 1;
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return register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL,
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tsk);
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}
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/*
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* Address bit 0 choose instruction (0) or data (1) break register, bits
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* 31..1 are the register number.
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* Both PTRACE_GETHBPREGS and PTRACE_SETHBPREGS transfer two 32-bit words:
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* address (0) and control (1).
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* Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set.
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* Data breakpoint control word bit 31 is 'trigger on store', bit 30 is
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* 'trigger on load, bits 29..0 are length. Length 0 is used to clear a
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* breakpoint. To set a breakpoint length must be a power of 2 in the range
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* 1..64 and the address must be length-aligned.
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*/
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static long ptrace_gethbpregs(struct task_struct *child, long addr,
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long __user *datap)
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{
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struct perf_event *bp;
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u32 user_data[2] = {0};
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bool dbreak = addr & 1;
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unsigned idx = addr >> 1;
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if ((!dbreak && idx >= XCHAL_NUM_IBREAK) ||
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(dbreak && idx >= XCHAL_NUM_DBREAK))
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return -EINVAL;
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if (dbreak)
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bp = child->thread.ptrace_wp[idx];
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else
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bp = child->thread.ptrace_bp[idx];
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if (bp) {
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user_data[0] = bp->attr.bp_addr;
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user_data[1] = bp->attr.disabled ? 0 : bp->attr.bp_len;
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if (dbreak) {
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if (bp->attr.bp_type & HW_BREAKPOINT_R)
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user_data[1] |= DBREAKC_LOAD_MASK;
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if (bp->attr.bp_type & HW_BREAKPOINT_W)
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user_data[1] |= DBREAKC_STOR_MASK;
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}
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}
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if (copy_to_user(datap, user_data, sizeof(user_data)))
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return -EFAULT;
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return 0;
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}
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static long ptrace_sethbpregs(struct task_struct *child, long addr,
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long __user *datap)
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{
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struct perf_event *bp;
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struct perf_event_attr attr;
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u32 user_data[2];
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bool dbreak = addr & 1;
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unsigned idx = addr >> 1;
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int bp_type = 0;
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if ((!dbreak && idx >= XCHAL_NUM_IBREAK) ||
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(dbreak && idx >= XCHAL_NUM_DBREAK))
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return -EINVAL;
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if (copy_from_user(user_data, datap, sizeof(user_data)))
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return -EFAULT;
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if (dbreak) {
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bp = child->thread.ptrace_wp[idx];
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if (user_data[1] & DBREAKC_LOAD_MASK)
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bp_type |= HW_BREAKPOINT_R;
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if (user_data[1] & DBREAKC_STOR_MASK)
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bp_type |= HW_BREAKPOINT_W;
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} else {
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bp = child->thread.ptrace_bp[idx];
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bp_type = HW_BREAKPOINT_X;
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}
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if (!bp) {
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bp = ptrace_hbp_create(child,
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bp_type ? bp_type : HW_BREAKPOINT_RW);
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if (IS_ERR(bp))
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return PTR_ERR(bp);
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if (dbreak)
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child->thread.ptrace_wp[idx] = bp;
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else
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child->thread.ptrace_bp[idx] = bp;
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}
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attr = bp->attr;
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attr.bp_addr = user_data[0];
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attr.bp_len = user_data[1] & ~(DBREAKC_LOAD_MASK | DBREAKC_STOR_MASK);
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attr.bp_type = bp_type;
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attr.disabled = !attr.bp_len;
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|
|
|
return modify_user_hw_breakpoint(bp, &attr);
|
|
}
|
|
#endif
|
|
|
|
long arch_ptrace(struct task_struct *child, long request,
|
|
unsigned long addr, unsigned long data)
|
|
{
|
|
int ret = -EPERM;
|
|
void __user *datap = (void __user *) data;
|
|
|
|
switch (request) {
|
|
case PTRACE_PEEKUSR: /* read register specified by addr. */
|
|
ret = ptrace_peekusr(child, addr, datap);
|
|
break;
|
|
|
|
case PTRACE_POKEUSR: /* write register specified by addr. */
|
|
ret = ptrace_pokeusr(child, addr, data);
|
|
break;
|
|
|
|
case PTRACE_GETREGS:
|
|
ret = ptrace_getregs(child, datap);
|
|
break;
|
|
|
|
case PTRACE_SETREGS:
|
|
ret = ptrace_setregs(child, datap);
|
|
break;
|
|
|
|
case PTRACE_GETXTREGS:
|
|
ret = ptrace_getxregs(child, datap);
|
|
break;
|
|
|
|
case PTRACE_SETXTREGS:
|
|
ret = ptrace_setxregs(child, datap);
|
|
break;
|
|
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
|
case PTRACE_GETHBPREGS:
|
|
ret = ptrace_gethbpregs(child, addr, datap);
|
|
break;
|
|
|
|
case PTRACE_SETHBPREGS:
|
|
ret = ptrace_sethbpregs(child, addr, datap);
|
|
break;
|
|
#endif
|
|
default:
|
|
ret = ptrace_request(child, request, addr, data);
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
void do_syscall_trace_enter(struct pt_regs *regs)
|
|
{
|
|
if (test_thread_flag(TIF_SYSCALL_TRACE) &&
|
|
tracehook_report_syscall_entry(regs))
|
|
regs->syscall = NO_SYSCALL;
|
|
|
|
if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
|
|
trace_sys_enter(regs, syscall_get_nr(current, regs));
|
|
}
|
|
|
|
void do_syscall_trace_leave(struct pt_regs *regs)
|
|
{
|
|
int step;
|
|
|
|
if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
|
|
trace_sys_exit(regs, regs_return_value(regs));
|
|
|
|
step = test_thread_flag(TIF_SINGLESTEP);
|
|
|
|
if (step || test_thread_flag(TIF_SYSCALL_TRACE))
|
|
tracehook_report_syscall_exit(regs, step);
|
|
}
|