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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3e5b6f05a2
Work was getting left behind in LRC contexts during reset. This causes a hang if the GPU is reset when HEAD==TAIL because the context's ringbuffer head and tail don't get reset and retiring a request doesn't alter them, so the ring still appears full. Added a function intel_lr_context_reset() to reset head and tail on a LRC and its ringbuffer. Call intel_lr_context_reset() for each context in i915_gem_context_reset() when in execlists mode. Testcase: igt/pm_rps --run-subtest reset #bdw Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88096 Signed-off-by: Thomas Daniel <thomas.daniel@intel.com> Reviewed-by: Dave Gordon <david.s.gordon@intel.com> [danvet: Flatten control flow in the lrc reset code a notch.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
94 lines
3.6 KiB
C
94 lines
3.6 KiB
C
/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _INTEL_LRC_H_
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#define _INTEL_LRC_H_
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#define GEN8_LR_CONTEXT_ALIGN 4096
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/* Execlists regs */
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#define RING_ELSP(ring) ((ring)->mmio_base+0x230)
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#define RING_EXECLIST_STATUS(ring) ((ring)->mmio_base+0x234)
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#define RING_CONTEXT_CONTROL(ring) ((ring)->mmio_base+0x244)
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#define CTX_CTRL_INHIBIT_SYN_CTX_SWITCH (1 << 3)
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#define CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT (1 << 0)
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#define RING_CONTEXT_STATUS_BUF(ring) ((ring)->mmio_base+0x370)
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#define RING_CONTEXT_STATUS_PTR(ring) ((ring)->mmio_base+0x3a0)
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/* Logical Rings */
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void intel_logical_ring_stop(struct intel_engine_cs *ring);
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void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
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int intel_logical_rings_init(struct drm_device *dev);
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int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx);
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/**
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* intel_logical_ring_advance() - advance the ringbuffer tail
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* @ringbuf: Ringbuffer to advance.
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*
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* The tail is only updated in our logical ringbuffer struct.
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*/
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static inline void intel_logical_ring_advance(struct intel_ringbuffer *ringbuf)
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{
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ringbuf->tail &= ringbuf->size - 1;
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}
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/**
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* intel_logical_ring_emit() - write a DWORD to the ringbuffer.
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* @ringbuf: Ringbuffer to write to.
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* @data: DWORD to write.
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*/
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static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf,
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u32 data)
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{
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iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
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ringbuf->tail += 4;
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}
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int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
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struct intel_context *ctx,
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int num_dwords);
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/* Logical Ring Contexts */
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void intel_lr_context_free(struct intel_context *ctx);
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int intel_lr_context_deferred_create(struct intel_context *ctx,
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struct intel_engine_cs *ring);
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void intel_lr_context_unpin(struct intel_engine_cs *ring,
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struct intel_context *ctx);
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void intel_lr_context_reset(struct drm_device *dev,
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struct intel_context *ctx);
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/* Execlists */
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int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
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int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
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struct intel_engine_cs *ring,
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struct intel_context *ctx,
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struct drm_i915_gem_execbuffer2 *args,
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struct list_head *vmas,
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struct drm_i915_gem_object *batch_obj,
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u64 exec_start, u32 flags);
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u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
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void intel_lrc_irq_handler(struct intel_engine_cs *ring);
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void intel_execlists_retire_requests(struct intel_engine_cs *ring);
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#endif /* _INTEL_LRC_H_ */
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